| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Rename PPC32*.h to PPC*.h | Chris Lattner | 2005-10-14 | 1 | -111/+0 |
| * | Rename PowerPC*.h to PPC*.h | Chris Lattner | 2005-10-14 | 1 | -1/+1 |
| * | Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td | Chris Lattner | 2005-10-14 | 1 | -2/+2 |
| * | Fix a CQ regression from my patch to split F32/F64 into seperate register | Chris Lattner | 2005-10-07 | 1 | -1/+2 |
| * | Modify the ppc backend to use two register classes for FP: F8RC and F4RC. | Chris Lattner | 2005-10-01 | 1 | -1/+1 |
| * | Teach the code generator that rlwimi is commutable if the rotate amount | Chris Lattner | 2005-09-09 | 1 | -0/+32 |
| * | Remove trailing whitespace | Misha Brukman | 2005-04-21 | 1 | -2/+2 |
| * | Initial support for allocation condition registers | Nate Begeman | 2005-04-12 | 1 | -0/+8 |
| * | Add ori reg, reg, 0 as a move instruction. This can be generated from | Nate Begeman | 2004-10-07 | 1 | -0/+11 |
| * | PowerPC 32-/64-bit split: Part I, PPC32* bit files, adapted from former PowerPC* | Misha Brukman | 2004-08-17 | 1 | -0/+59 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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