Initial support for allocation condition registers

llvm-svn: 21246

1 files changed, 8 insertions, 0 deletions

diff --git a/llvm/lib/Target/PowerPC/PPC32InstrInfo.cpp b/llvm/lib/Target/PowerPC/PPC32InstrInfo.cpp
index ec25239721d..d8f008a1fea 100644
--- a/llvm/lib/Target/PowerPC/PPC32InstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPC32InstrInfo.cpp
@@ -65,6 +65,14 @@ bool PPC32InstrInfo::isMoveInstr(const MachineInstr& MI,
     sourceReg = MI.getOperand(1).getReg();
     destReg = MI.getOperand(0).getReg();
     return true;
+  } else if (oc == PPC::MCRF) {             // mcrf cr1, cr2
+    assert(MI.getNumOperands() == 2 &&
+           MI.getOperand(0).isRegister() &&
+           MI.getOperand(1).isRegister() &&
+           "invalid PPC MCRF instruction");
+    sourceReg = MI.getOperand(1).getReg();
+    destReg = MI.getOperand(0).getReg();
+    return true;
   }
   return false;
 }