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path: root/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
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* [mips][microMIPS] Implement BLTZC, BLEZC, BGEZC and BGTZC instructions, fix d...Hrvoje Varga2016-08-221-9/+111
* Replace "fallthrough" comments with LLVM_FALLTHROUGHJustin Bogner2016-08-171-1/+1
* [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2...Zlatko Buljan2016-07-111-0/+43
* [mips][atomics] Fix atomic instruction descriptions and uses.Simon Dardis2016-06-141-0/+23
* [mips][microMIPS] Implement BOVC, BNVC, EXT, INS and JALRC instructionsHrvoje Varga2016-06-091-0/+72
* [MIPS][LLVM-MC] Fix Disassemble of Negative OffsetSagar Thakur2016-05-241-8/+8
* [mips][microMIPS] Implement BEQZC and BNEZC instructionsZoran Jovanovic2016-05-171-0/+15
* [mips][microMIPS] Implement APPEND, BPOSGE32C, MODSUB, MULSA.W.PH and MULSAQ_...Hrvoje Varga2016-05-131-0/+14
* Revert "[mips][microMIPS] Implement CFC*, CTC* and LDC* instructions"Hrvoje Varga2016-05-121-40/+0
* [mips][microMIPS] Implement CFC*, CTC* and LDC* instructionsHrvoje Varga2016-05-111-0/+40
* [mips][microMIPS] Implement LWP and SWP instructionsZlatko Buljan2016-05-091-1/+2
* [mips][microMIPS] Revert commit r266861.Zoran Jovanovic2016-04-221-40/+0
* [mips][microMIPS] Implement BGEC, BGEUC, BLTC, BLTUC, BEQC and BNEC instructionsZoran Jovanovic2016-04-201-0/+94
* [mips][microMIPS]Implement CFC*, CTC* and LDC* instructionsHrvoje Varga2016-04-201-0/+40
* [mips] Range check simm16Daniel Sanders2016-03-311-13/+0
* [mips][microMIPS] Implement MFC*, MFHC* and DMFC* instructionsZlatko Buljan2016-03-311-3/+4
* [mips][microMIPS] Implement MTC*, MTHC* and DMTC* instructionsHrvoje Varga2016-03-241-0/+11
* [mips] Range check simm7.Daniel Sanders2016-03-221-10/+11
* [mips] Range check uimm6_lsl2.Daniel Sanders2016-03-141-27/+15
* [mips] Range check simm4.Daniel Sanders2016-03-111-13/+13
* Revert "[mips] Promote the result of SETCC nodes to GPR width."Vasileios Kalintiris2016-03-011-36/+10
* [mips] Promote the result of SETCC nodes to GPR width.Vasileios Kalintiris2016-03-011-10/+36
* Reflect the MC/MCDisassembler split on the include/ level.Benjamin Kramer2016-01-261-1/+1
* [mips][microMIPS] Implement DERET and DI instructions and check size operand ...Zlatko Buljan2015-12-211-14/+0
* [mips][microMIPS] Fix issue with offset operand of BALC and BC instructionsZoran Jovanovic2015-11-301-0/+17
* Fix UMRs in Mips disassembler on invalid instruction streamsReid Kleckner2015-11-191-1/+9
* [mips][microMIPS] Implement LWM16, SB16, SH16, SW16, SWSP and SWM16 instructionsZlatko Buljan2015-11-121-2/+26
* [mips][ias] Range check uimm2 operands and fix a bug this revealed.Daniel Sanders2015-11-061-12/+9
* [mips][microMIPS] Implement PAUSE, RDHWR, RDPGPR, SDBBP, SSNOP, SYNC, SYNCI a...Hrvoje Varga2015-10-281-0/+20
* [mips][microMIPS] Implement LB, LBE, LBU and LBUE instructionsHrvoje Varga2015-10-161-0/+46
* [mips][microMIPS] Implement LLE and SCE instructionsHrvoje Varga2015-10-151-0/+3
* [mips][microMIPS] Fix an invalid read for lwm32 and reserved reglist values.Daniel Sanders2015-09-181-0/+6
* [mips][microMIPS] Fix an issue with disassembling lwm32 instructionZoran Jovanovic2015-09-151-1/+1
* [mips] Added support for various EVA ASE instructions.Daniel Sanders2015-09-151-12/+37
* [mips][microMIPS] Implement ADDU16, AND16, ANDI16, NOT16, OR16, SLL16 and SRL...Zoran Jovanovic2015-09-091-0/+13
* [mips][microMIPS] Implement CACHEE and PREFE instructionsZoran Jovanovic2015-09-091-0/+22
* [mips][microMIPS] Implement SB, SBE, SCE, SH and SHE instructionsZoran Jovanovic2015-09-081-0/+23
* [mips][microMIPS] Implement BC16, BEQZC16 and BNEZC16 instructionsZoran Jovanovic2015-09-071-6/+22
* [mips][microMIPS] Implement SW and SWE instructionsZoran Jovanovic2015-08-181-0/+23
* [mips][microMIPS] Create microMIPS64r6 subtarget and implement DALIGN, DAUI, ...Zoran Jovanovic2015-08-121-1/+2
* [mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0.Daniel Sanders2015-06-271-0/+17
* [mips] Fix some UB by shifting before sign-extendingJustin Bogner2015-06-231-1/+1
* [mips] Add new format for dmtc2/dmfc2 for Octeon CPUs.Kai Nacke2015-05-281-0/+12
* Use std::bitset for SubtargetFeatures.Michael Kuperstein2015-05-261-5/+5
* MC: Modernize MCOperand API naming. NFC.Jim Grosbach2015-05-131-146/+146
* Reverting r237234, "Use std::bitset for SubtargetFeatures"Michael Kuperstein2015-05-131-5/+5
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-05-131-5/+5
* [mips][microMIPSr6] Implement disassembler supportJozef Kolek2015-04-201-4/+11
* Revert "Use std::bitset for SubtargetFeatures"Michael Kuperstein2015-03-241-5/+5
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-03-241-5/+5
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