[mips][microMIPS] Implement MTC*, MTHC* and DMTC* instructions

Differential Revision: http://reviews.llvm.org/D17328

llvm-svn: 264246

1 files changed, 11 insertions, 0 deletions

diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
index e2d96ff5427..8f7aeb286d2 100644
--- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
+++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
@@ -918,6 +918,17 @@ DecodeStatus MipsDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
       Size = 4;
       return Result;
     }
+
+    if (hasMips32r6()) {
+      DEBUG(dbgs() << "Trying MicroMips32r6FPU table (32-bit opcodes):\n");
+      Result = decodeInstruction(DecoderTableMicroMips32r6FPU32, Instr, Insn,
+                                 Address, this, STI);
+      if (Result != MCDisassembler::Fail) {
+        Size = 4;
+        return Result;
+      }
+    }
+
     // This is an invalid instruction. Let the disassembler move forward by the
     // minimum instruction size.
     Size = 2;