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| author | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2016-05-17 11:10:15 +0000 |
|---|---|---|
| committer | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2016-05-17 11:10:15 +0000 |
| commit | 84e4d59e47542e633fc2167c5996cf1ad484ef15 (patch) | |
| tree | 1eb250753141ee72db80a3e1874f123278ce0c86 /llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | |
| parent | 009494fe093feff8d48d5bbf333075f3ce220d8d (diff) | |
| download | bcm5719-llvm-84e4d59e47542e633fc2167c5996cf1ad484ef15.tar.gz bcm5719-llvm-84e4d59e47542e633fc2167c5996cf1ad484ef15.zip | |
[mips][microMIPS] Implement BEQZC and BNEZC instructions
Differential Revision: http://reviews.llvm.org/D15417
llvm-svn: 269755
Diffstat (limited to 'llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index 5f1cf894ed0..5dfe37f1cff 100644 --- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -209,6 +209,11 @@ static DecodeStatus DecodeBranchTarget21(MCInst &Inst, uint64_t Address, const void *Decoder); +static DecodeStatus DecodeBranchTarget21MM(MCInst &Inst, + unsigned Offset, + uint64_t Address, + const void *Decoder); + static DecodeStatus DecodeBranchTarget26(MCInst &Inst, unsigned Offset, uint64_t Address, @@ -1861,6 +1866,16 @@ static DecodeStatus DecodeBranchTarget21(MCInst &Inst, return MCDisassembler::Success; } +static DecodeStatus DecodeBranchTarget21MM(MCInst &Inst, + unsigned Offset, + uint64_t Address, + const void *Decoder) { + int32_t BranchOffset = SignExtend32<21>(Offset) << 1; + + Inst.addOperand(MCOperand::createImm(BranchOffset)); + return MCDisassembler::Success; +} + static DecodeStatus DecodeBranchTarget26(MCInst &Inst, unsigned Offset, uint64_t Address, |
