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path: root/llvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp
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* Move helpers into anonymous namespaces. NFC.Benjamin Kramer2016-08-061-0/+2
* [Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFCKrzysztof Parzyszek2016-07-291-8/+8
* [Hexagon] Misc changes to HexagonMachineScheduler, NFCKrzysztof Parzyszek2016-07-181-26/+3
* [Hexagon] Enable .cur formation in MISched for Hexagon V60Krzysztof Parzyszek2016-07-181-0/+8
* [Hexagon] Add verbose debugging mode to Hexagon MI SchedulerKrzysztof Parzyszek2016-07-181-8/+71
* [Hexagon] Use timing class info as tie-breaker in machine schedulerKrzysztof Parzyszek2016-07-181-0/+66
* [Hexagon] HexagonMachineScheduler should account for resourcesKrzysztof Parzyszek2016-07-181-10/+78
* [Hexagon] Fix zero latency instructions with multiple predecessorsKrzysztof Parzyszek2016-07-181-2/+30
* [Hexagon] Handle instruction latency for 0 or 2 cyclesKrzysztof Parzyszek2016-07-151-0/+22
* [Hexagon] Make MI scheduler check for stalls in previous packet on v60Krzysztof Parzyszek2016-07-151-0/+28
* [Hexagon] Replace postprocessDAG with a more elaborate DAG mutationKrzysztof Parzyszek2016-07-151-10/+76
* [Hexagon] Add a scheduling DAG mutationKrzysztof Parzyszek2016-07-151-0/+4
* CodeGen: Update DFAPacketizer API to take MachineInstr&, NFCDuncan P. N. Exon Smith2016-02-271-2/+2
* Make MachineScheduler debug output less confusing.James Y Knight2015-09-181-1/+5
* Move HexagonMachineScheduler to use the subtarget off of theEric Christopher2015-02-021-9/+6
* Fix null reference creation in ScheduleDAGInstrs constructor call.Alexey Samsonov2014-08-201-1/+1
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-2/+6
* Fix 'platform-specific' hyphenationsAlp Toker2014-06-301-2/+2
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-8/+8
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-2/+2
* Replace PROLOG_LABEL with a new CFI_INSTRUCTION.Rafael Espindola2014-03-071-1/+1
* Factor MI-Sched in preparation for post-ra scheduling support.Andrew Trick2013-12-281-7/+10
* Rename variables for consistency.Eli Friedman2013-09-111-3/+3
* Fix unused variables.Eli Friedman2013-09-101-2/+0
* mi-sched: Precompute a PressureDiff for each instruction, adjust for liveness...Andrew Trick2013-08-301-5/+5
* Fix a memory leak in the hexagon scheduler. We call initialize here moreChandler Carruth2013-07-271-0/+2
* Machine Model: Add MicroOpBufferSize and resource BufferSize.Andrew Trick2013-06-151-2/+2
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-2/+1
* Cleanup #includes.Jakub Staszak2013-03-101-1/+2
* Added FIXME for future Hexagon cleanup.Andrew Trick2013-03-021-0/+3
* MIsched: HazardRecognizers are created for each DAG. Free them.Andrew Trick2013-02-131-1/+3
* MIsched: Improve the interface to SchedDFS analysis (subtrees).Andrew Trick2013-01-251-1/+7
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-1/+0
* ScheduleDAG interface. Added OrderKind to distinguish nonregister dependencies.Andrew Trick2012-11-061-2/+1
* misched: Use the TargetSchedModel interface wherever possible.Andrew Trick2012-10-101-10/+13
* DAG post-process for Hexagon MI schedulerSergei Larin2012-09-141-0/+27
* Remove redundant private field.Benjamin Kramer2012-09-141-1/+1
* Reorganize MachineScheduler interfaces and publish them in the header.Andrew Trick2012-09-111-312/+12
* Add "blocked" heuristic to the Hexagon MI scheduler.Sergei Larin2012-09-101-36/+114
* Porting Hexagon MI Scheduler to the new API.Sergei Larin2012-09-041-0/+874
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