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path: root/llvm/lib/Target/Alpha/AlphaRegisterInfo.h
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* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-2/+2
| | | | llvm-svn: 46930
* Move even more functionality from MRegisterInfo into TargetInstrInfo.Owen Anderson2008-01-071-10/+0
| | | | | | Some day I'll get it all moved over... llvm-svn: 45672
* Move some more instruction creation methods from RegisterInfo into InstrInfo.Owen Anderson2008-01-011-25/+0
| | | | llvm-svn: 45484
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Add a argument to storeRegToStackSlot and storeRegToAddr to specify whetherEvan Cheng2007-12-051-2/+2
| | | | | | the stored register is killed. llvm-svn: 44600
* Remove redundant foldMemoryOperand variants and other code clean up.Evan Cheng2007-12-021-13/+3
| | | | llvm-svn: 44517
* Allow some reloads to be folded in multi-use cases. Specifically testl r, r ↵Evan Cheng2007-12-011-0/+12
| | | | | | -> cmpl [mem], 0. llvm-svn: 44479
* Add parameter to getDwarfRegNum to permit targetsDale Johannesen2007-11-131-1/+1
| | | | | | | | to use different mappings for EH and debug info; no functional change yet. Fix warning in X86CodeEmitter. llvm-svn: 44056
* Use TableGen to emit information for dwarf register numbers. Anton Korobeynikov2007-11-111-0/+2
| | | | | | | | This makes DwarfRegNum to accept list of numbers instead. Added three different "flavours", but only slightly tested on x86-32/linux. Please check another subtargets if possible, llvm-svn: 43997
* - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but ↵Evan Cheng2007-10-181-2/+2
| | | | | | | | only returns the opcode of the instruction post unfolding. - Fix some copy+paste bugs. llvm-svn: 43153
* Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister ↵Evan Cheng2007-10-181-4/+4
| | | | | | public interface. llvm-svn: 43150
* - Added a few target hooks to generate load / store instructions from / to anyEvan Cheng2007-10-051-0/+10
| | | | | | | | address (not just from / to frameindexes). - Added target hooks to unfold load / store instructions / SDNodes into separate load, data processing, store instructions / SDNodes. llvm-svn: 42621
* Allow copyRegToReg to emit cross register classes copies.Evan Cheng2007-09-261-1/+2
| | | | | | Tested with "make check"! llvm-svn: 42346
* Add a variant of foldMemoryOperand to fold any load / store, not just load / ↵Evan Cheng2007-08-301-0/+5
| | | | | | store from / to stack slots. llvm-svn: 41597
* Long live the exception handling!Anton Korobeynikov2007-07-141-2/+3
| | | | | | | | | | | | | | | This patch fills the last necessary bits to enable exceptions handling in LLVM. Currently only on x86-32/linux. In fact, this patch adds necessary intrinsics (and their lowering) which represent really weird target-specific gcc builtins used inside unwinder. After corresponding llvm-gcc patch will land (easy) exceptions should be more or less workable. However, exceptions handling support should not be thought as 'finished': I expect many small and not so small glitches everywhere. llvm-svn: 39855
* eliminateFrameIndex() change.Evan Cheng2007-05-011-1/+1
| | | | llvm-svn: 36626
* Added MRegisterInfo hook to re-materialize an instruction.Evan Cheng2007-03-201-0/+3
| | | | llvm-svn: 35205
* PEI now passes a RegScavenger ptr to eliminateFrameIndex.Evan Cheng2007-02-281-1/+2
| | | | llvm-svn: 34707
* Support to provide exception and selector registers.Jim Laskey2007-02-211-0/+4
| | | | llvm-svn: 34482
* Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.Evan Cheng2007-02-191-0/+2
| | | | llvm-svn: 34428
* For PR1207:Reid Spencer2007-02-191-2/+0
| | | | | | | Revert patches that caused the problem. Evan, please investigate and reapply when you've discovered the problem. llvm-svn: 34399
* Added getReservedRegs().Evan Cheng2007-02-171-0/+2
| | | | llvm-svn: 34376
* hasFP() is now a virtual method of MRegisterInfo.Evan Cheng2007-01-231-0/+2
| | | | llvm-svn: 33455
* Fix naming inconsistency.Evan Cheng2007-01-021-2/+2
| | | | llvm-svn: 32823
* Change MachineInstr ctor's to take a TargetInstrDescriptor reference insteadEvan Cheng2006-11-271-0/+1
| | | | | | of opcode and number of operands. llvm-svn: 31947
* Matches MachineInstr changes.Evan Cheng2006-11-131-1/+3
| | | | llvm-svn: 31712
* getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.Evan Cheng2006-05-181-0/+4
| | | | llvm-svn: 28378
* Foundation for call frame information.Jim Laskey2006-04-071-1/+2
| | | | llvm-svn: 27491
* Expose base register for DwarfWriter. Refactor code accordingly.Jim Laskey2006-03-281-2/+2
| | | | llvm-svn: 27225
* Add support to locate local variables in frames (early version.)Jim Laskey2006-03-231-0/+3
| | | | llvm-svn: 26994
* Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far ↵Chris Lattner2006-02-021-2/+0
| | | | | | more logical place. Other methods should also be moved if anyoneis interested. :) llvm-svn: 25913
* whatever. Intermediate patch to see what breaks. Seems ok.Andrew Lenharth2005-11-091-0/+3
| | | | llvm-svn: 24260
* This seems useful from the original patch that added the function. If there ↵Andrew Lenharth2005-10-091-0/+2
| | | | | | is a reason it is not useful on a RISC type target, let me know and I will pull it out llvm-svn: 23676
* Pass extra regclasses into spilling codeChris Lattner2005-09-301-2/+4
| | | | llvm-svn: 23537
* This code has always been dead for alphaChris Lattner2005-08-191-1/+0
| | | | llvm-svn: 22915
* Remove trailing whitespaceMisha Brukman2005-04-211-3/+3
| | | | llvm-svn: 21424
* Make the rest of file header comments consistent in format and styleMisha Brukman2005-02-051-1/+1
| | | | llvm-svn: 20048
* Make file header comment consistent: extend the whole 80 cols to fill the lineMisha Brukman2005-02-041-1/+1
| | | | llvm-svn: 20039
* Let me introduce you to the early stages of the llvm backend for the alpha ↵Andrew Lenharth2005-01-221-0/+57
processor llvm-svn: 19764
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