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| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-10-09 20:11:35 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-10-09 20:11:35 +0000 |
| commit | 1dfb85c7afb8294baebb6e0230717d822d44d5e1 (patch) | |
| tree | 7dcee14b258c9b0b4d0e80451e9dbcd05608146e /llvm/lib/Target/Alpha/AlphaRegisterInfo.h | |
| parent | 62010c450f3ee4bb718655487d80426dd19b424c (diff) | |
| download | bcm5719-llvm-1dfb85c7afb8294baebb6e0230717d822d44d5e1.tar.gz bcm5719-llvm-1dfb85c7afb8294baebb6e0230717d822d44d5e1.zip | |
This seems useful from the original patch that added the function. If there is a reason it is not useful on a RISC type target, let me know and I will pull it out
llvm-svn: 23676
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaRegisterInfo.h')
| -rw-r--r-- | llvm/lib/Target/Alpha/AlphaRegisterInfo.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaRegisterInfo.h b/llvm/lib/Target/Alpha/AlphaRegisterInfo.h index 0d8c24a50e7..8be85cc7c69 100644 --- a/llvm/lib/Target/Alpha/AlphaRegisterInfo.h +++ b/llvm/lib/Target/Alpha/AlphaRegisterInfo.h @@ -34,6 +34,8 @@ struct AlphaRegisterInfo : public AlphaGenRegisterInfo { MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC) const; + + virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const; void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, unsigned SrcReg, |
