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path: root/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
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* Remove the Alpha backend.Dan Gohman2011-10-271-425/+0
| | | | llvm-svn: 143164
* Fix undefined shifts and abs in Alpha backend. Based on patch by Ahmed Charles.Eli Friedman2011-10-131-4/+3
| | | | llvm-svn: 141909
* rename MVT::Flag to MVT::Glue. "Flag" is a terrible name forChris Lattner2010-12-211-3/+3
| | | | | | | something that just glues two nodes together, even if it is sometimes used for flags. llvm-svn: 122310
* zap dead code.Chris Lattner2010-09-041-13/+0
| | | | llvm-svn: 113073
* PR7774: Fix undefined shifts in Alpha backend. As a bonus, this actuallyEli Friedman2010-08-011-2/+2
| | | | | | improves the generated code in some cases. llvm-svn: 109985
* Use const qualifiers with TargetLowering. This eliminates severalDan Gohman2010-04-171-1/+0
| | | | | | | | | | | | | const_casts, and it reinforces the design of the Target classes being immutable. SelectionDAGISel::IsLegalToFold is now a static member function, because PIC16 uses it in an unconventional way. There is more room for API cleanup here. And PIC16's AsmPrinter no longer uses TargetLowering. llvm-svn: 101635
* rename llvm::llvm_report_error -> llvm::report_fatal_errorChris Lattner2010-04-071-1/+1
| | | | llvm-svn: 100709
* Sink InstructionSelect() out of each target into SDISel, and rename itChris Lattner2010-03-021-14/+1
| | | | | | | | | | | | DoInstructionSelection. Inline "SelectRoot" into it from DAGISelHeader. Sink some other stuff out of DAGISelHeader into SDISel. Eliminate the various 'Indent' stuff from various targets, which dates to when isel was recursive. 17 files changed, 114 insertions(+), 430 deletions(-) llvm-svn: 97555
* mark all the generated node predicates 'const'.Chris Lattner2010-02-161-1/+1
| | | | llvm-svn: 96337
* Change SelectCode's argument from SDValue to SDNode *, to make it moreDan Gohman2010-01-051-14/+12
| | | | | | | | | clear what information these functions are actually using. This is also a micro-optimization, as passing a SDNode * around is simpler than passing a { SDNode *, int } by value or reference. llvm-svn: 92564
* Remove uninteresting and confusing debug output.Dan Gohman2009-11-051-2/+0
| | | | llvm-svn: 86149
* Rename getTargetNode to getMachineNode, for consistency with theDan Gohman2009-09-251-29/+29
| | | | | | | | naming scheme used in SelectionDAG, where there are multiple kinds of "target" nodes, but "machine" nodes are nodes which represent a MachineInstr. llvm-svn: 82790
* Simplify a few more things, eliminating a few more dependencies onDan Gohman2009-08-151-2/+0
| | | | | | "the current basic block". llvm-svn: 79069
* Push LLVMContexts through the IntegerType APIs.Owen Anderson2009-08-131-1/+2
| | | | llvm-svn: 78948
* Split EVT into MVT and EVT, the former representing _just_ a primitive type, ↵Owen Anderson2009-08-111-27/+27
| | | | | | | | while the latter is capable of representing either a primitive or an extended type. llvm-svn: 78713
* Rename MVT to EVT, in preparation for splitting SimpleValueType out into its ↵Owen Anderson2009-08-101-27/+27
| | | | | | own struct type. llvm-svn: 78610
* Use abs64 instead abs; some platforms don't have a 64-bit abs overload. ↵Benjamin Kramer2009-08-091-1/+1
| | | | | | Noticed by Yonggang Luo! llvm-svn: 78543
* move this fp select into a patternAndrew Lenharth2009-08-081-19/+0
| | | | llvm-svn: 78464
* Revert the ConstantInt constructors back to their 2.5 forms where possible, ↵Owen Anderson2009-07-241-1/+1
| | | | | | thanks to contexts-on-types. More to come. llvm-svn: 77011
* Switch Alpha over to the new call lowering style. New code mostly Eli Friedman2009-07-191-72/+3
| | | | | | | | | | | | | copied from the SystemZ target. I don't think this causes any significant changes to the output (I compared the assembly, and the results appeared to be essentially unchanged), although I don't actually have an Alpha to test on. I would appreciate if anyone with the appropriate hardware could test this. I'm not sure if that includes anyone subscribed to llvm-commits, though. llvm-svn: 76353
* Move EVER MORE stuff over to LLVMContext.Owen Anderson2009-07-141-1/+2
| | | | llvm-svn: 75703
* llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin2009-07-141-4/+4
| | | | | | | | | This adds location info for all llvm_unreachable calls (which is a macro now) in !NDEBUG builds. In NDEBUG builds location info and the message is off (it only prints "UREACHABLE executed"). llvm-svn: 75640
* assert(0) -> LLVM_UNREACHABLE.Torok Edwin2009-07-111-4/+4
| | | | | | | | | Make llvm_unreachable take an optional string, thus moving the cerr<< out of line. LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for NDEBUG builds. llvm-svn: 75379
* Implement changes from Chris's feedback.Torok Edwin2009-07-081-0/+2
| | | | | | Finish converting lib/Target. llvm-svn: 75043
* Convert more abort() calls to llvm_report_error().Torok Edwin2009-07-081-1/+1
| | | | | | Also remove trailing semicolon. llvm-svn: 75027
* Convert Alpha and Mips to use a MachineFunctionInfo subclass toDan Gohman2009-06-031-39/+29
| | | | | | | | | | carry GlobalBaseReg, and GlobalRetAddr too in Alpha's case. This eliminates the need for them to search through the MachineRegisterInfo livein list in order to identify these virtual registers. EmitLiveInCopies is now the only user of the virtual register portion of MachineRegisterInfo's livein data. llvm-svn: 72802
* Remove non-DebugLoc forms of CopyToReg and CopyFromReg.Dale Johannesen2009-02-041-34/+46
| | | | | | Adjust callers. llvm-svn: 63789
* Move a few containers out of ScheduleDAGInstrs::BuildSchedGraphDan Gohman2009-01-151-1/+1
| | | | | | | | | | | and into the ScheduleDAGInstrs class, so that they don't get destructed and re-constructed for each block. This fixes a compile-time hot spot in the post-pass scheduler. To help facilitate this, tidy and do some minor reorganization in the scheduler constructor functions. llvm-svn: 62275
* Eliminate the ISel priority queue, which used the topological order for aDan Gohman2008-11-051-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | priority function. Instead, just iterate over the AllNodes list, which is already in topological order. This eliminates a fair amount of bookkeeping, and speeds up the isel phase by about 15% on many testcases. The impact on most targets is that AddToISelQueue calls can be simply removed. In the x86 target, there are two additional notable changes. The rule-bending AND+SHIFT optimization in MatchAddress that creates new pre-isel nodes during isel is now a little more verbose, but more robust. Instead of either creating an invalid DAG or creating an invalid topological sort, as it has historically done, it can now just insert the new nodes into the node list at a position where they will be consistent with the topological ordering. Also, the address-matching code has logic that checked to see if a node was "already selected". However, when a node is selected, it has all its uses taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any further visits from MatchAddress. This code is now removed. llvm-svn: 58748
* Have TableGen emit setSubgraphColor calls under control of a -gen-debugDavid Greene2008-10-271-1/+1
| | | | | | | | flag. Then in a debugger developers can set breakpoints at these calls to see waht is about to be selected and what the resulting subgraph looks like. This really helps when debugging instruction selection. llvm-svn: 58278
* Trim #includes.Dan Gohman2008-10-161-2/+0
| | | | llvm-svn: 57649
* Note that ADDC and company don't actually expand yet (missing in legalizeAndrew Lenharth2008-10-071-1/+2
| | | | llvm-svn: 57226
* Avoid creating two TargetLowering objects for each target.Dan Gohman2008-10-031-4/+1
| | | | | | | | | | | | Instead, just create one, and make sure everything that needs it can access it. Previously most of the SelectionDAGISel subclasses all had their own TargetLowering object, which was redundant with the TargetLowering object in the TargetMachine subclasses, except on Sparc, where SparcTargetMachine didn't have a TargetLowering object. Change Sparc to work more like the other targets here. llvm-svn: 57016
* Rename ConstantSDNode::getValue to getZExtValue, for consistencyDan Gohman2008-09-121-3/+3
| | | | | | | with ConstantInt. This led to fixing a bug in TargetLowering.cpp using getValue instead of getAPIntValue. llvm-svn: 56159
* erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif2008-08-281-4/+4
| | | | | | Node to reflect semantics llvm-svn: 55504
* Move the point at which FastISel taps into the SelectionDAGISelDan Gohman2008-08-231-5/+4
| | | | | | | | | | | | | | | | | | process up to a higher level. This allows FastISel to leverage more of SelectionDAGISel's infastructure, such as updating Machine PHI nodes. Also, implement transitioning from SDISel back to FastISel in the middle of a block, so it's now possible to go back and forth. This allows FastISel to hand individual CallInsts and other complicated things off to SDISel to handle, while handling the rest of the block itself. To help support this, reorganize the SelectionDAG class so that it is allocated once and reused throughout a function, instead of being completely reallocated for each block. llvm-svn: 55219
* Simplify SelectRoot's interface, and factor out some common codeDan Gohman2008-08-211-1/+1
| | | | | | from all targets. llvm-svn: 55124
* Rename SDOperand to SDValue.Dan Gohman2008-07-271-50/+50
| | | | llvm-svn: 54128
* Add a new function, ReplaceAllUsesOfValuesWith, which handles bulkDan Gohman2008-07-171-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | replacement of multiple values. This is slightly more efficient than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically could be optimized even further. However, an important property of this new function is that it handles the case where the source value set and destination value set overlap. This makes it feasible for isel to use SelectNodeTo in many very common cases, which is advantageous because SelectNodeTo avoids a temporary node and it doesn't require CSEMap updates for users of values that don't change position. Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to handle operand lists more efficiently, and to correctly handle a number of corner cases to which its new wider use exposes it. This commit also includes a change to the encoding of post-isel opcodes in SDNodes; now instead of being sandwiched between the target-independent pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel opcodes are now represented as negative values. This makes it possible to test if an opcode is pre-isel or post-isel without having to know the size of the current target's post-isel instruction set. These changes speed up llc overall by 3% and reduce memory usage by 10% on the InstructionCombining.cpp testcase with -fast and -regalloc=local. llvm-svn: 53728
* Split scheduling from instruction selection.Evan Cheng2008-06-301-7/+4
| | | | llvm-svn: 52923
* Wrap MVT::ValueType in a struct to get type safetyDuncan Sands2008-06-061-8/+8
| | | | | | | | | | | | | | | | and better control the abstraction. Rename the type to MVT. To update out-of-tree patches, the main thing to do is to rename MVT::ValueType to MVT, and rewrite expressions like MVT::getSizeInBits(VT) in the form VT.getSizeInBits(). Use VT.getSimpleVT() to extract a MVT::SimpleValueType for use in switch statements (you will get an assert failure if VT is an extended value type - these shouldn't exist after type legalization). This results in a small speedup of codegen and no new testsuite failures (x86-64 linux). llvm-svn: 52044
* Change target-specific classes to use more precise static types.Dan Gohman2008-05-141-3/+3
| | | | | | | This eliminates the need for several awkward casts, including the last dynamic_cast under lib/Target. llvm-svn: 51091
* Convert MaskedValueIsZero and all its users to use APInt. Also addDan Gohman2008-02-251-1/+3
| | | | | | a SignBitIsZero function to simplify a common use case. llvm-svn: 47561
* Dwarf requires variable entries to be in the source order. Right now, since ↵Evan Cheng2008-02-041-1/+0
| | | | | | we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead. llvm-svn: 46724
* explicitly include Compiler.h instead of getting it from tblgen in the ↵Chris Lattner2008-02-031-0/+1
| | | | | | middle of a class. llvm-svn: 46676
* SDIsel processes llvm.dbg.declare by recording the variable debug ↵Evan Cheng2008-02-021-0/+1
| | | | | | | | | information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes. For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time. llvm-svn: 46659
* Rename SSARegMap -> MachineRegisterInfo in keeping with the idea Chris Lattner2007-12-311-7/+5
| | | | | | | | | | | | | | that "machine" classes are used to represent the current state of the code being compiled. Given this expanded name, we can start moving other stuff into it. For now, move the UsedPhysRegs and LiveIn/LoveOuts vectors from MachineFunction into it. Update all the clients to match. This also reduces some needless #includes, such as MachineModuleInfo from MachineFunction. llvm-svn: 45467
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Enhance APFloat to retain bits of NaNs (fixes oggenc).Dale Johannesen2007-08-311-5/+5
| | | | | | | Use APFloat interfaces for more references, mostly of ConstantFPSDNode. llvm-svn: 41632
* Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits fromDan Gohman2007-06-221-1/+1
| | | | | | | | | TargetLowering to SelectionDAG so that they have more convenient access to the current DAG, in preparation for the ValueType routines being changed from standalone functions to members of SelectionDAG for the pre-legalize vector type changes. llvm-svn: 37704
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