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path: root/llvm/lib/Target/ARM/Thumb1InstrInfo.h
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* Use MCRegister in copyPhysRegMatt Arsenault2019-11-111-1/+1
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [ARM] Allow the scheduler to clone a node with glue to avoid a copy CPSR ↔ ...Roger Ferrer Ibanez2018-01-311-0/+1
* Re-commit r301040 "X86: Don't emit zero-byte functions on Windows"Hans Wennborg2017-04-211-2/+2
* Revert r301040 "X86: Don't emit zero-byte functions on Windows"Hans Wennborg2017-04-211-2/+2
* X86: Don't emit zero-byte functions on WindowsHans Wennborg2017-04-211-2/+2
* Don't pass Reloc::Model to places that already have it. NFC.Rafael Espindola2016-06-281-2/+1
* Pass DebugLoc and SDLoc by const ref.Benjamin Kramer2016-06-121-3/+2
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-231-1/+1
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-191-1/+1
* In preparation for moving ARM's TargetRegisterInfo to the TargetMachineEric Christopher2015-03-121-3/+3
* Canonicalize header guards into a common format.Benjamin Kramer2014-08-131-3/+3
* [stack protector] Fix a potential security bug in stack protector where theAkira Hatanaka2014-07-251-0/+3
* Prune includes in ARM target.Craig Topper2014-03-221-1/+0
* [C++11] Add 'override' keyword to virtual methods that override their base cl...Craig Topper2014-03-101-6/+6
* Replace uses of ARMBaseInstrInfo and ARMTargetMachine with the Base versions.Craig Topper2012-03-251-1/+0
* Reorder includes to match coding standards. Fix an issue or two exposed by that.Craig Topper2012-03-171-2/+2
* ARM implement TargetInstrInfo::getNoopForMachoTarget()Jim Grosbach2012-02-281-0/+3
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* Move callee-saved regs spills / reloads to TFIAnton Korobeynikov2010-11-271-9/+0
* Formatting.Eric Christopher2010-10-151-4/+4
* RISC architectures get their memory operand folding for free.Jakob Stoklund Olesen2010-07-111-14/+0
* Replace copyRegToReg with copyPhysReg for ARM.Jakob Stoklund Olesen2010-07-111-6/+4
* Implement @llvm.returnaddress. rdar://8015977.Evan Cheng2010-05-221-2/+4
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-061-1/+2
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-061-2/+4
* Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor ofDan Gohman2009-12-051-3/+0
* Refactor code.Evan Cheng2009-11-081-4/+0
* 80-column cleanup of file header commentsJim Grosbach2009-11-071-1/+1
* - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relativeEvan Cheng2009-11-061-0/+4
* Whitespace cleanup. Remove trailing whitespace.Jim Grosbach2009-08-111-1/+1
* - More refactoring. This gets rid of all of the getOpcode calls.Evan Cheng2009-07-281-3/+0
* Merge isLoadFromStackSlot into one since it behaves the same regardless of su...Evan Cheng2009-07-271-5/+0
* Just use a single isMoveInstr to catch all the cases.Evan Cheng2009-07-271-3/+0
* Remove unused member functions.Eli Friedman2009-07-241-10/+0
* Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index eliminatio...David Goodwin2009-07-241-7/+0
* Fix frame index elimination to correctly handle thumb-2 addressing modes that...David Goodwin2009-07-231-0/+7
* Checkpoint Thumb2 Instr info work. Generalized base code so that it can be sh...David Goodwin2009-07-081-0/+10
* Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1Ins...David Goodwin2009-07-021-0/+93
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