| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | ARMDisassembler: drop bogus dependency on ARMCodeGen | Dylan Noblesmith | 2012-04-03 | 1 | -2/+1 |
| * | Remove unnecessary llvm:: qualifications | Craig Topper | 2012-03-27 | 1 | -209/+209 |
| * | Added soft fail checks for the disassembler when decoding some corner cases o... | Silviu Baranga | 2012-03-22 | 1 | -1/+81 |
| * | Added soft fail cases for the disassembler when decoding LDRSBT, LDRHT or LDR... | Silviu Baranga | 2012-03-22 | 1 | -3/+31 |
| * | Fix ARM disassembly of VST1 and VST2 instructions with writeback. And add test | Kevin Enderby | 2012-03-21 | 1 | -0/+19 |
| * | The ARM instructions that have an unpredictable behavior when the pc register... | Silviu Baranga | 2012-03-20 | 1 | -2/+8 |
| * | Use uint16_t to store registers and opcode in static tables in the target spe... | Craig Topper | 2012-03-11 | 1 | -6/+6 |
| * | Tidy up. Remove dead code that slipped into previous commit. | Jim Grosbach | 2012-03-07 | 1 | -6/+0 |
| * | ARM more NEON VLD/VST composite physical register refactoring. | Jim Grosbach | 2012-03-06 | 1 | -0/+7 |
| * | ARM refactor more NEON VLD/VST instructions to use composite physregs | Jim Grosbach | 2012-03-06 | 1 | -25/+41 |
| * | Fix a bug in the ARM disassembly of the neon VLD2 all lanes instruction. | Kevin Enderby | 2012-03-06 | 1 | -7/+7 |
| * | ARM Refactor VLD/VST spaced pair instructions. | Jim Grosbach | 2012-03-05 | 1 | -0/+50 |
| * | ARM refactor away a bunch of VLD/VST pseudo instructions. | Jim Grosbach | 2012-03-05 | 1 | -6/+89 |
| * | Make MemoryObject accessor members const again | Derek Schuff | 2012-02-29 | 1 | -4/+4 |
| * | Fix the symbolic operand added for the C disassmbler API for the ARM bl | Kevin Enderby | 2012-02-27 | 1 | -1/+1 |
| * | Updated the llvm-mc disassembler C API to support for the X86 target. | Kevin Enderby | 2012-02-23 | 1 | -33/+35 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
| * | Make the EDis tables const. | Benjamin Kramer | 2012-02-11 | 1 | -4/+4 |
| * | Convert assert(0) to llvm_unreachable | Craig Topper | 2012-02-07 | 1 | -1/+1 |
| * | Enable streaming of bitcode | Derek Schuff | 2012-02-06 | 1 | -4/+4 |
| * | More dead code removal (using -Wunreachable-code) | David Blaikie | 2012-01-20 | 1 | -1/+1 |
| * | ARM NEON VTBL/VTBX assembly parsing and encoding. | Jim Grosbach | 2011-12-15 | 1 | -4/+1 |
| * | ARM NEON refactor VST2 w/ writeback instructions. | Jim Grosbach | 2011-12-14 | 1 | -9/+18 |
| * | ARM NEON VST2 assembly parsing and encoding. | Jim Grosbach | 2011-12-14 | 1 | -30/+0 |
| * | ARM assembly parsing and encoding for VLD2 with writeback. | Jim Grosbach | 2011-12-09 | 1 | -9/+18 |
| * | Remove unused variable | Matt Beaumont-Gay | 2011-11-30 | 1 | -2/+0 |
| * | ARM parsing for VLD1 all lanes, with writeback. | Jim Grosbach | 2011-11-30 | 1 | -10/+6 |
| * | ARM assembly parsing and encoding for four-register VST1. | Jim Grosbach | 2011-11-29 | 1 | -28/+8 |
| * | ARM assembly parsing and encoding for three-register VST1. | Jim Grosbach | 2011-11-29 | 1 | -20/+8 |
| * | Fix a misplaced paren bug. | Owen Anderson | 2011-11-15 | 1 | -1/+1 |
| * | Fix an ambiguous decoding where we failed to properly decode VMOVv2f32 and VM... | Owen Anderson | 2011-11-15 | 1 | -8/+62 |
| * | Re-apply 144430, this time with the associated isel and disassmbler bits. | Jim Grosbach | 2011-11-12 | 1 | -4/+0 |
| * | Remove the unnecessary dependency on libARMCodeGen from libARMDisassembler. | Benjamin Kramer | 2011-11-11 | 1 | -1/+1 |
| * | The rules disallowing single-register reglist operands only apply to the POP ... | Owen Anderson | 2011-11-02 | 1 | -5/+1 |
| * | Register list operands are not allowed to contain only a single register. Al... | Owen Anderson | 2011-11-02 | 1 | -1/+5 |
| * | Fix disassembly of some VST1 instructions. | Owen Anderson | 2011-11-01 | 1 | -5/+19 |
| * | ARM VST1 w/ writeback assembly parsing and encoding. | Jim Grosbach | 2011-10-31 | 1 | -12/+16 |
| * | More not-crashing NEON disassembly updates for the vld refactoring. | Owen Anderson | 2011-10-31 | 1 | -0/+4 |
| * | Reapply r143202, with a manual decoding hook for SWP. This change inadvertan... | Owen Anderson | 2011-10-28 | 1 | -0/+24 |
| * | Add some NEON stores to the VLD decoding hook that were accidentally omitted ... | Owen Anderson | 2011-10-27 | 1 | -0/+4 |
| * | ARM assembly parsing and encoding for VLD1 with writeback. | Jim Grosbach | 2011-10-25 | 1 | -4/+8 |
| * | ARM assembly parsing and encoding for VLD1 w/ writeback. | Jim Grosbach | 2011-10-24 | 1 | -4/+8 |
| * | ARM refactor am6offset usage for VLD1. | Jim Grosbach | 2011-10-24 | 1 | -12/+51 |
| * | Fix a NEON disassembly case that was broken in the recent refactorings. As m... | Owen Anderson | 2011-10-24 | 1 | -6/+0 |
| * | Move various generated tables into read-only memory, fixing up const correctn... | Benjamin Kramer | 2011-10-22 | 1 | -1/+1 |
| * | Assembly parsing for 4-register sequential variant of VLD2. | Jim Grosbach | 2011-10-21 | 1 | -18/+0 |
| * | Assembly parsing for 2-register sequential variant of VLD2. | Jim Grosbach | 2011-10-21 | 1 | -6/+0 |
| * | Assembly parsing for 4-register variant of VLD1. | Jim Grosbach | 2011-10-21 | 1 | -24/+0 |
| * | Assembly parsing for 3-register variant of VLD1. | Jim Grosbach | 2011-10-21 | 1 | -16/+0 |
| * | ARM VLD parsing and encoding. | Jim Grosbach | 2011-10-21 | 1 | -8/+0 |
