| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures. | Michael Kuperstein | 2015-02-19 | 1 | -39/+32 |
| * | Use std::bitset for SubtargetFeatures | Michael Kuperstein | 2015-02-19 | 1 | -32/+39 |
| * | [ARM] SSAT/USAT with an 'asr #32' shift should result in an undefined encodin... | Bradley Smith | 2015-01-19 | 1 | -1/+1 |
| * | Remove unused function. | Asiri Rathnayake | 2014-12-02 | 1 | -11/+0 |
| * | Add post-decode checking of HVC instruction. | Charlie Turner | 2014-12-01 | 1 | -1/+23 |
| * | Pass an ArrayRef to MCDisassembler::getInstruction. | Rafael Espindola | 2014-11-12 | 1 | -12/+7 |
| * | Misc style fixes. NFC. | Rafael Espindola | 2014-11-10 | 1 | -130/+120 |
| * | [ARM] Remove dead code identified by the Clang static analyzer. | Tilmann Scheller | 2014-11-05 | 1 | -2/+0 |
| * | [ARM] Honor FeatureD16 in the assembler and disassembler | Oliver Stannard | 2014-11-05 | 1 | -1/+5 |
| * | [Thumb2] Improve disassembly of memory hints | Oliver Stannard | 2014-10-23 | 1 | -7/+57 |
| * | Thumb2 M-class MSR instruction support changes | Renato Golin | 2014-09-01 | 1 | -12/+21 |
| * | ARM: implement MRS/MSR (banked reg) system instructions. | Tim Northover | 2014-08-15 | 1 | -0/+25 |
| * | Allow only disassembling of M-class MSR masks that the assembler knows how to... | James Molloy | 2014-08-01 | 1 | -1/+47 |
| * | [Modules] Fix potential ODR violations by sinking the DEBUG_TYPE | Chandler Carruth | 2014-04-22 | 1 | -2/+2 |
| * | [MC] Require an MCContext when constructing an MCDisassembler. | Lang Hames | 2014-04-15 | 1 | -8/+12 |
| * | ARM: rename ARMle/ARMbe with ARMLE/ARMBE, and Thumble/Thumbbe with ThumbLE/Th... | Christian Pirker | 2014-04-01 | 1 | -4/+4 |
| * | Add ARM big endian Target (armeb, thumbeb) | Christian Pirker | 2014-03-28 | 1 | -2/+6 |
| * | [C++11] Add 'override' keyword to virtual methods that override their base cl... | Craig Topper | 2014-03-10 | 1 | -10/+6 |
| * | [ARM] Handling for coprocessor instructions that are undefined starting from ... | Artyom Skrobov | 2013-11-08 | 1 | -0/+10 |
| * | [ARM] NEON instructions were erroneously decoded from certain invalid encodings | Artyom Skrobov | 2013-10-30 | 1 | -20/+20 |
| * | ARM: provide diagnostics on more writeback LDM/STM instructions | Tim Northover | 2013-10-22 | 1 | -14/+16 |
| * | [ARM] Remove an unused function from the disassembler. | Joey Gouly | 2013-10-01 | 1 | -11/+0 |
| * | [ARMv8] Add support for the v8 cryptography extensions. | Amara Emerson | 2013-09-19 | 1 | -0/+20 |
| * | This corrects creation of operands for t2PLDW. It also removes the definition... | Mihai Popa | 2013-08-06 | 1 | -0/+2 |
| * | [ARMv8] Add support for the NEON instructions vmaxnm/vminnm. | Joey Gouly | 2013-07-17 | 1 | -0/+18 |
| * | Remove an unneeded call to 'UpdateThumbVFPPredicate', spotted by Amaury. | Joey Gouly | 2013-07-04 | 1 | -1/+0 |
| * | Add support for MC assembling and disassembling of vsel{ge, gt, eq, vs} instr... | Joey Gouly | 2013-07-04 | 1 | -0/+15 |
| * | ARM: check predicate bits for thumb instructions | Amaury de la Vieuville | 2013-06-24 | 1 | -13/+17 |
| * | ARM: rGPR is meant to be unpredictable, not undefined | Amaury de la Vieuville | 2013-06-24 | 1 | -2/+5 |
| * | ARM: fix IT decoding | Amaury de la Vieuville | 2013-06-24 | 1 | -4/+2 |
| * | ARM: enable decoding of pc-relative PLD/PLI | Amaury de la Vieuville | 2013-06-24 | 1 | -36/+115 |
| * | ARM: fix thumb literal loads decoding | Amaury de la Vieuville | 2013-06-18 | 1 | -18/+205 |
| * | ARM: thumb stores cannot use PC as dest register | Amaury de la Vieuville | 2013-06-18 | 1 | -0/+37 |
| * | ARM: fix B decoding | Amaury de la Vieuville | 2013-06-13 | 1 | -1/+1 |
| * | ARM: Enforce decoding rules for VLDn instructions | Amaury de la Vieuville | 2013-06-11 | 1 | -28/+36 |
| * | ARM: Fix STREX/LDREX reecoding | Amaury de la Vieuville | 2013-06-11 | 1 | -10/+28 |
| * | ARM: ISB cannot be passed the same options as DMB | Amaury de la Vieuville | 2013-06-10 | 1 | -0/+11 |
| * | ARM: fix VMOVvnf32 decoding when ambiguous with VCVT | Amaury de la Vieuville | 2013-06-08 | 1 | -0/+4 |
| * | ARM: enforce SRS decoding constraints | Amaury de la Vieuville | 2013-06-08 | 1 | -1/+7 |
| * | ARM: fix CPS decoding when ambiguous with QADD | Amaury de la Vieuville | 2013-06-08 | 1 | -0/+32 |
| * | ARM: fix VCVT decoding | Amaury de la Vieuville | 2013-06-08 | 1 | -2/+2 |
| * | ARM: add fstmx and fldmx instructions for assembly | Tim Northover | 2013-05-31 | 1 | -2/+15 |
| * | Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros. | Michael J. Spencer | 2013-05-24 | 1 | -1/+1 |
| * | Remove the Copied parameter from MemoryObject::readBytes. | Benjamin Kramer | 2013-05-24 | 1 | -3/+3 |
| * | Add MCSymbolizer for symbolic/annotated disassembly. | Ahmed Bougacha | 2013-05-24 | 1 | -107/+4 |
| * | VSTn instructions have a number of encoding constraints which are not impleme... | Mihai Popa | 2013-05-20 | 1 | -0/+51 |
| * | Q registers are encoded in fields of the same length as D registers. As Q reg... | Mihai Popa | 2013-05-20 | 1 | -1/+1 |
| * | Replace some bit operations with simpler ones. No functionality change. | Benjamin Kramer | 2013-05-19 | 1 | -1/+1 |
| * | The purpose of the patch is to fix the syntax of ARM mrc and mrc2 instruction... | Mihai Popa | 2013-05-13 | 1 | -0/+18 |
| * | ARM: Fix encoding of hint instruction for Thumb. | Quentin Colombet | 2013-04-26 | 1 | -4/+6 |
