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author | Artyom Skrobov <Artyom.Skrobov@arm.com> | 2013-11-08 16:16:30 +0000 |
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committer | Artyom Skrobov <Artyom.Skrobov@arm.com> | 2013-11-08 16:16:30 +0000 |
commit | e686cec7d487c9cd23cbd8d12211bc891630c427 (patch) | |
tree | b7d4ccb3a0db43535f8cf081b5ee886631a6740b /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
parent | 08b2257f14340d601e23be391b840417079cb5ac (diff) | |
download | bcm5719-llvm-e686cec7d487c9cd23cbd8d12211bc891630c427.tar.gz bcm5719-llvm-e686cec7d487c9cd23cbd8d12211bc891630c427.zip |
[ARM] Handling for coprocessor instructions that are undefined starting from ARMv8 (ARM encodings)
llvm-svn: 194261
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index cbf1429dbe6..9c7988f8a85 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -1363,6 +1363,11 @@ static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, break; } + uint64_t featureBits = ((const MCDisassembler*)Decoder)->getSubtargetInfo() + .getFeatureBits(); + if ((featureBits & ARM::HasV8Ops) && (coproc != 14)) + return MCDisassembler::Fail; + Inst.addOperand(MCOperand::CreateImm(coproc)); Inst.addOperand(MCOperand::CreateImm(CRd)); if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) @@ -3814,6 +3819,11 @@ static DecodeStatus DecodeCoprocessor(MCInst &Inst, unsigned Val, if (Val == 0xA || Val == 0xB) return MCDisassembler::Fail; + uint64_t featureBits = ((const MCDisassembler*)Decoder)->getSubtargetInfo() + .getFeatureBits(); + if ((featureBits & ARM::HasV8Ops) && !(Val == 14 || Val == 15)) + return MCDisassembler::Fail; + Inst.addOperand(MCOperand::CreateImm(Val)); return MCDisassembler::Success; } |