diff options
| author | Amaury de la Vieuville <amaury.dlv@gmail.com> | 2013-06-08 13:54:05 +0000 |
|---|---|---|
| committer | Amaury de la Vieuville <amaury.dlv@gmail.com> | 2013-06-08 13:54:05 +0000 |
| commit | f4ec0c8510dc3cc994b2c81822ddc17a6e6a82ee (patch) | |
| tree | bd19359198dfe679b9f0d75d3d71520b3de4bc13 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | 68bcd021fd4240395088fcea4886d0f5f2f31fc0 (diff) | |
| download | bcm5719-llvm-f4ec0c8510dc3cc994b2c81822ddc17a6e6a82ee.tar.gz bcm5719-llvm-f4ec0c8510dc3cc994b2c81822ddc17a6e6a82ee.zip | |
ARM: fix VMOVvnf32 decoding when ambiguous with VCVT
Enforce Table A7-15 (op=1, cmode=0b111) -> UNDEF
llvm-svn: 183612
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 08853cb3bb5..6f15a3d60b7 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -4470,11 +4470,13 @@ static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn, Vm |= (fieldFromInstruction(Insn, 5, 1) << 4); unsigned imm = fieldFromInstruction(Insn, 16, 6); unsigned cmode = fieldFromInstruction(Insn, 8, 4); + unsigned op = fieldFromInstruction(Insn, 5, 1); DecodeStatus S = MCDisassembler::Success; // VMOVv2f32 is ambiguous with these decodings. if (!(imm & 0x38) && cmode == 0xF) { + if (op == 1) return MCDisassembler::Fail; Inst.setOpcode(ARM::VMOVv2f32); return DecodeNEONModImmInstruction(Inst, Insn, Address, Decoder); } @@ -4498,11 +4500,13 @@ static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn, Vm |= (fieldFromInstruction(Insn, 5, 1) << 4); unsigned imm = fieldFromInstruction(Insn, 16, 6); unsigned cmode = fieldFromInstruction(Insn, 8, 4); + unsigned op = fieldFromInstruction(Insn, 5, 1); DecodeStatus S = MCDisassembler::Success; // VMOVv4f32 is ambiguous with these decodings. if (!(imm & 0x38) && cmode == 0xF) { + if (op == 1) return MCDisassembler::Fail; Inst.setOpcode(ARM::VMOVv4f32); return DecodeNEONModImmInstruction(Inst, Insn, Address, Decoder); } |
