summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp
Commit message (Expand)AuthorAgeFilesLines
...
* Teach ARM Target to use the tblgen support for generating an MC'izedJim Grosbach2010-11-031-46/+62
* trailing whitespaceJim Grosbach2010-11-031-2/+2
* Put the PC encoding in the correct bit position.Bill Wendling2010-11-031-1/+1
* The MC code couldn't handle ARM LDR instructions with negative offsets:Bill Wendling2010-11-031-19/+65
* Obsessive formatting changes. No functionality impact.Bill Wendling2010-11-021-31/+37
* Omit unused parameter name.Bill Wendling2010-11-021-1/+1
* Simplify the EncodeInstruction method now that a lot of the special case stuffBill Wendling2010-11-021-13/+6
* Rename getAddrModeImm12OpValue to getAddrModeImmOpValue and expand it to workBill Wendling2010-11-021-21/+20
* Rename encoder methods to match naming convention.Owen Anderson2010-11-021-4/+4
* Add correct encodings for the rest of the vld instructions that we generate.Owen Anderson2010-11-021-1/+1
* Add correct NEON encodings for vld2, vld3, and vld4 basic variants.Owen Anderson2010-11-021-0/+9
* Add aesthetic break.Owen Anderson2010-11-021-1/+1
* Add correct NEON encodings for the "multiple single elements" form of vld.Owen Anderson2010-11-021-1/+17
* Explicitly check for non-consant reference in an LDRi12 instruction. Add FIXMEJim Grosbach2010-11-011-1/+10
* Remove unused function.Jim Grosbach2010-11-011-13/+0
* Avoid re-evaluating MI.getNumOperands() every iteration of the loop.Jim Grosbach2010-10-301-1/+1
* Encode the register list operands for ARM mode LDM/STM instructions.Jim Grosbach2010-10-301-0/+15
* trailing whitespaceJim Grosbach2010-10-291-2/+2
* s/getNEONVcvtImm32/getNEONVcvtImm32OpValue/ to be consistent with other operandJim Grosbach2010-10-291-1/+1
* PLD, PLDW, PLI encodings, plus refactor their use of addrmode2.Jim Grosbach2010-10-281-3/+9
* Provide correct encodings for NEON vcvt, which has its own special immediate ...Owen Anderson2010-10-271-0/+4
* First part of refactoring ARM addrmode2 (load/store) instructions to be moreJim Grosbach2010-10-261-0/+23
* ARM Binary encoding information for BFC/BFI instructions.Jim Grosbach2010-10-211-0/+14
* Move the encoding logic for Q registers into getMachineOpValue().Owen Anderson2010-10-211-1/+12
* ARM mode encoding information for UBFX and SBFX instructions.Jim Grosbach2010-10-151-0/+4
* Add support for vmov.f64/.f32 encoding. There's a bit of a hack going onBill Wendling2010-10-141-3/+5
* Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions.Jim Grosbach2010-10-131-0/+10
* Add the rest of the ARM so_reg encoding options (register shifted register)Jim Grosbach2010-10-121-18/+74
* Move the ARM so_imm encoding into a custom operand encoder and remove theJim Grosbach2010-10-121-26/+14
* Add custom encoder for the 's' bit denoting whether an ARM arithmeticJim Grosbach2010-10-121-9/+7
* Add MOVi ARM encoding.Jim Grosbach2010-10-121-0/+7
* Nuke unused wrapper function.Jim Grosbach2010-10-121-3/+0
* Add encoding information for the remainder of the generic arithmeticJim Grosbach2010-10-121-19/+36
* MC machine encoding for simple aritmetic instructions that use a shiftedJim Grosbach2010-10-111-1/+21
* Implement a few more binary encoding bits. Still very early stage proof-of-Jim Grosbach2010-10-081-0/+19
* Reapply 116059, this time without the fatfingered pasto at the top.Jim Grosbach2010-10-081-9/+5
* Reverting 116059. Bots are unhappy with it.Jim Grosbach2010-10-081-5/+9
* 'const'ify getMachineOpValue() and associated helpers.Jim Grosbach2010-10-081-9/+5
* Enable binary encoding of some simple instructions.Jim Grosbach2010-10-081-0/+8
* Make <target>CodeEmitter::getBinaryCodeForInstr() a const method.Jim Grosbach2010-10-081-1/+1
* Trivial MC code emitter shell. No instruction forms actually handled yet.Jim Grosbach2010-10-071-3/+19
* Include the auto-generated bits for machine encoding.Jim Grosbach2010-10-071-0/+20
* ARM instruction don't have instruction prefixes, so remove the helper functionsJim Grosbach2010-10-071-16/+1
* Fix build.Michael J. Spencer2010-09-181-0/+1
* Add skeleton infrastructure for the ARMMCCodeEmitter class. Patch by Jason Kim!Jim Grosbach2010-09-171-0/+114
OpenPOWER on IntegriCloud