diff options
| author | Jim Grosbach <grosbach@apple.com> | 2010-10-12 23:18:08 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-10-12 23:18:08 +0000 |
| commit | 12e493ace4fc5b499361122bc5f25d2c46bea5e4 (patch) | |
| tree | adb4b717635c9a6040f217b1ee477393180ceb46 /llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp | |
| parent | d5f8c3350dd7d59a25f3a8ec24b7ed8d3eb01dab (diff) | |
| download | bcm5719-llvm-12e493ace4fc5b499361122bc5f25d2c46bea5e4.tar.gz bcm5719-llvm-12e493ace4fc5b499361122bc5f25d2c46bea5e4.zip | |
Move the ARM so_imm encoding into a custom operand encoder and remove the
explicit handling of the instructions referencing it from the MC code
emitter.
llvm-svn: 116367
Diffstat (limited to 'llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp | 40 |
1 files changed, 14 insertions, 26 deletions
diff --git a/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp b/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp index 12219317091..8bb8b2616c8 100644 --- a/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp +++ b/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp @@ -55,6 +55,20 @@ public: // '1' respectively. return MI.getOperand(Op).getReg() == ARM::CPSR; } + /// getSOImmOpValue - Return an encoded 12-bit shifted-immediate value. + unsigned getSOImmOpValue(const MCInst &MI, unsigned Op) const { + unsigned SoImm = MI.getOperand(Op).getImm(); + int SoImmVal = ARM_AM::getSOImmVal(SoImm); + assert(SoImmVal != -1 && "Not a valid so_imm value!"); + + // Encode rotate_imm. + unsigned Binary = (ARM_AM::getSOImmValRot((unsigned)SoImmVal) >> 1) + << ARMII::SoRotImmShift; + + // Encode immed_8. + Binary |= ARM_AM::getSOImmValImm((unsigned)SoImmVal); + return Binary; + } unsigned getNumFixupKinds() const { assert(0 && "ARMMCCodeEmitter::getNumFixupKinds() not yet implemented."); @@ -93,19 +107,6 @@ public: } // end anonymous namespace -unsigned ARMMCCodeEmitter::getMachineSoImmOpValue(unsigned SoImm) const { - int SoImmVal = ARM_AM::getSOImmVal(SoImm); - assert(SoImmVal != -1 && "Not a valid so_imm value!"); - - // Encode rotate_imm. - unsigned Binary = (ARM_AM::getSOImmValRot((unsigned)SoImmVal) >> 1) - << ARMII::SoRotImmShift; - - // Encode immed_8. - Binary |= ARM_AM::getSOImmValImm((unsigned)SoImmVal); - return Binary; -} - MCCodeEmitter *llvm::createARMMCCodeEmitter(const Target &, TargetMachine &TM, MCContext &Ctx) { @@ -157,19 +158,6 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS, unsigned Value = getBinaryCodeForInstr(MI); switch (Opcode) { default: break; - case ARM::MOVi: - // The shifted immediate value. - Value |= getMachineSoImmOpValue((unsigned)MI.getOperand(1).getImm()); - break; - case ARM::ADDri: - case ARM::ANDri: - case ARM::BICri: - case ARM::EORri: - case ARM::ORRri: - case ARM::SUBri: - // The shifted immediate value. - Value |= getMachineSoImmOpValue((unsigned)MI.getOperand(2).getImm()); - break; case ARM::ADDrs: case ARM::ANDrs: case ARM::BICrs: |

