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path: root/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
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* Move kill flags when the same register occurs more than once in a sequence.Jakob Stoklund Olesen2009-12-231-1/+22
* Handle undef operands properly.Jakob Stoklund Olesen2009-12-231-4/+8
* Make insert position available to MergeOpsUpdate.Jakob Stoklund Olesen2009-12-231-24/+25
* Perform kill flag calculations in new method. No functional changes.Jakob Stoklund Olesen2009-12-231-12/+15
* Move repeated code to a new method. No functional change.Jakob Stoklund Olesen2009-12-231-17/+47
* Fix a bunch of little errors that Clang complains about when its being pedanticDouglas Gregor2009-12-191-1/+1
* improve portability to avoid conflicting with std::next in c++'0x.Chris Lattner2009-12-031-3/+3
* When expanding t2STRDi8 r, r to two stores, add kill markers correctly.Evan Cheng2009-11-141-0/+7
* Use Unified Assembly Syntax for the ARM backend.Jim Grosbach2009-11-091-46/+46
* Remove includes of Support/Compiler.h that are no longer needed after theNick Lewycky2009-10-251-1/+0
* Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.Nick Lewycky2009-10-251-2/+2
* Load / store multiple was missing opportunites when the load / store bundles ...Evan Cheng2009-10-221-0/+3
* Change ld/st multiples to explicitly model the writeback to base register. Th...Evan Cheng2009-10-011-3/+20
* Fix PR4687. Pre ARMv5te does not support ldrd / strd. Patch by John Tytgat.Evan Cheng2009-09-291-0/+4
* Enable pre-regalloc load / store multiple pass for Thumb2.Evan Cheng2009-09-271-55/+88
* Add comment.Evan Cheng2009-09-261-0/+1
* Code clean up and prepare for Thumb2 support. No functionality changes.Evan Cheng2009-09-251-21/+49
* Improve MachineMemOperand handling.Dan Gohman2009-09-251-3/+3
* Update register class references to use the global constant ARM::*RegisterCla...Jim Grosbach2009-09-111-1/+1
* Simplify RegScavenger::FindUnusedReg.Jakob Stoklund Olesen2009-08-181-6/+2
* Push LLVMContexts through the IntegerType APIs.Owen Anderson2009-08-131-1/+4
* Whitespace cleanup. Remove trailing whitespace.Jim Grosbach2009-08-111-2/+2
* Code refactoring. No functionality change.Evan Cheng2009-08-081-22/+9
* It turns out most of the thumb2 instructions are not allowed to touch SP. The...Evan Cheng2009-08-071-4/+16
* Enable load / store multiple pass for Thumb2. It's not using ldrd / strd yet.Evan Cheng2009-08-041-6/+9
* Thumb2 does not have ib (increment before) and da (decrement after) forms of ...Evan Cheng2009-08-041-4/+10
* Load / store multiple pass fixes for Thumb2. Not enabled yet.Evan Cheng2009-08-041-76/+85
* llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin2009-07-141-3/+3
* Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies...Evan Cheng2009-07-111-1/+1
* Remove a bogus assertion.Evan Cheng2009-07-101-2/+0
* Initial support for load / store multiple opt pass Thumb2 support (post-alloc...Evan Cheng2009-07-091-55/+158
* Change how so_imm and t2_so_imm are handled. At instruction selection time, t...Evan Cheng2009-07-081-3/+2
* Implement changes from Chris's feedback.Torok Edwin2009-07-081-3/+3
* Start converting to new error handling API.Torok Edwin2009-07-081-3/+4
* Enable arm pre-allocation load / store multiple optimization pass.Evan Cheng2009-06-191-16/+36
* Transfer dead markers when a ldrd is changed into a ldm or a pair of ldr.Evan Cheng2009-06-191-15/+20
* - Update register allocation hint after coalescing. This is done by the targe...Evan Cheng2009-06-181-18/+48
* Typo.Evan Cheng2009-06-151-1/+1
* Do not form ldrd / strd if the two dests / srcs are the same. Code clean up.Evan Cheng2009-06-151-59/+73
* Silence a warning.Evan Cheng2009-06-151-1/+1
* Part 1.Evan Cheng2009-06-151-6/+197
* Add a ARM specific pre-allocation pass that re-schedule loads / stores fromEvan Cheng2009-06-131-22/+314
* Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order chan...Evan Cheng2009-06-051-5/+5
* When merging multiple load / store instructions. Use the DebugLoc of the firs...Evan Cheng2009-06-051-11/+16
* Code clean up: return vector by reference rather than by value. No functional...Evan Cheng2009-06-051-21/+21
* Re-apply 72756 with fixes. One of those was introduced by we changed MachineI...Evan Cheng2009-06-041-1/+8
* Temporarily revert 72756 for now.Evan Cheng2009-06-031-7/+0
* Fold preceding / trailing base inc / dec into the single load / store as well.Evan Cheng2009-06-031-2/+9
* Change MachineInstrBuilder::addReg() to take a flag instead of a list ofBill Wendling2009-05-131-9/+10
* Remove refs to non-DebugLoc versions of BuildMI from ARM.Dale Johannesen2009-02-131-7/+13
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