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author | Jim Grosbach <grosbach@apple.com> | 2009-08-11 15:33:49 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2009-08-11 15:33:49 +0000 |
commit | f24f9d9cb6f5f3c70d6b26104b14e29c7dbd0720 (patch) | |
tree | 3b13b278d28fa92f9edb77b6ac3e3747d9db02ed /llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | |
parent | 74eb9e7bfd838f2a9e0c84b94ee83d2ec2a855cd (diff) | |
download | bcm5719-llvm-f24f9d9cb6f5f3c70d6b26104b14e29c7dbd0720.tar.gz bcm5719-llvm-f24f9d9cb6f5f3c70d6b26104b14e29c7dbd0720.zip |
Whitespace cleanup. Remove trailing whitespace.
llvm-svn: 78666
Diffstat (limited to 'llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index 3c2bdc756f6..11d4887e259 100644 --- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -162,7 +162,7 @@ static bool isi32Store(unsigned Opc) { /// MergeOps - Create and insert a LDM or STM with Base as base register and /// registers in Regs as the register operands that would be loaded / stored. -/// It returns true if the transformation is done. +/// It returns true if the transformation is done. bool ARMLoadStoreOpt::MergeOps(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, @@ -968,7 +968,7 @@ bool ARMLoadStoreOpt::LoadStoreMultipleOpti(MachineBasicBlock &MBB) { if (MergeBaseUpdateLoadStore(MBB, MemOps[i].MBBI, TII,Advance,MBBI)) ++NumMerges; - // RS may be pointing to an instruction that's deleted. + // RS may be pointing to an instruction that's deleted. RS->skipTo(prior(MBBI)); } else if (NumMemOps == 1) { // Try folding preceeding/trailing base inc/dec into the single |