| Commit message (Expand) | Author | Age | Files | Lines |
* | Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM | Daniel Sanders | 2019-08-15 | 1 | -1/+1 |
* | [ARM] Add OptMinSize to ARMSubtarget | Sam Parker | 2019-02-08 | 1 | -1/+1 |
* | Update the file headers across all of the LLVM projects in the monorepo | Chandler Carruth | 2019-01-19 | 1 | -4/+3 |
* | [ARM] Move machine operand target flags to ARMBaseInstrInfo | Martin Storsjo | 2018-08-22 | 1 | -28/+0 |
* | [MI] Change the array of `MachineMemOperand` pointers to be | Chandler Carruth | 2018-08-16 | 1 | -1/+1 |
* | [arm] Implement Target Operand Flag MIR serialization. | Evgeniy Stepanov | 2018-01-11 | 1 | -0/+28 |
* | Re-commit r301040 "X86: Don't emit zero-byte functions on Windows" | Hans Wennborg | 2017-04-21 | 1 | -2/+2 |
* | Revert r301040 "X86: Don't emit zero-byte functions on Windows" | Hans Wennborg | 2017-04-21 | 1 | -2/+2 |
* | X86: Don't emit zero-byte functions on Windows | Hans Wennborg | 2017-04-21 | 1 | -2/+2 |
* | [ARM] CodeGen: Remove AddDefaultPred. NFC. | Diana Picus | 2017-01-13 | 1 | -4/+5 |
* | [CodeGen] Split out the notions of MI invariance and MI dereferenceability. | Justin Lebar | 2016-09-11 | 1 | -1/+3 |
* | [CodeGen] Take a MachineMemOperand::Flags in MachineFunction::getMachineMemOp... | Justin Lebar | 2016-07-15 | 1 | -2/+2 |
* | Don't pass a Reloc::Model to GVIsIndirectSymbol. | Rafael Espindola | 2016-06-28 | 1 | -2/+1 |
* | Don't pass Reloc::Model to places that already have it. NFC. | Rafael Espindola | 2016-06-28 | 1 | -8/+9 |
* | ARM/ELF: Better codegen for global variable addresses. | Peter Collingbourne | 2015-10-26 | 1 | -70/+0 |
* | ARMInstrInfo.cpp: Reformat. | NAKAMURA Takumi | 2015-09-22 | 1 | -66/+65 |
* | PseudoSourceValue: Replace global manager with a manager in a machine function. | Alex Lorenz | 2015-08-11 | 1 | -1/+1 |
* | Move most user of TargetMachine::getDataLayout to the Module one | Mehdi Amini | 2015-07-16 | 1 | -1/+1 |
* | Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) | Alexander Kornienko | 2015-06-23 | 1 | -1/+1 |
* | Fixed/added namespace ending comments using clang-tidy. NFC | Alexander Kornienko | 2015-06-19 | 1 | -1/+1 |
* | MC: Modernize MCOperand API naming. NFC. | Jim Grosbach | 2015-05-13 | 1 | -8/+8 |
* | Remove the need to cache the subtarget in the ARM TargetRegisterInfo | Eric Christopher | 2015-03-12 | 1 | -2/+1 |
* | Cleanup and remove a chunk of getARMSubtarget calls in the | Eric Christopher | 2015-03-05 | 1 | -0/+4 |
* | Get the cached subtarget off the MachineFunction rather than | Eric Christopher | 2015-02-20 | 1 | -1/+1 |
* | Remove calls to bare getSubtarget and clean up the functions | Eric Christopher | 2015-01-30 | 1 | -9/+6 |
* | Migrate ARM except for TTI, AsmPrinter, and frame lowering | Eric Christopher | 2015-01-29 | 1 | -5/+5 |
* | Move DataLayout back to the TargetMachine from TargetSubtargetInfo | Eric Christopher | 2015-01-26 | 1 | -3/+2 |
* | [ARM, stack protector] If supported, use armv7 instructions. | Akira Hatanaka | 2014-10-23 | 1 | -4/+39 |
* | [ARM] Move the implementation of the target hooks related to copy-related | Quentin Colombet | 2014-08-22 | 1 | -69/+0 |
* | [ARM] Mark VSETLNi32 with the InsertSubreg property and implement the related | Quentin Colombet | 2014-08-21 | 1 | -0/+23 |
* | [ARM] Mark VMOVRRD with the ExtractSubreg property and implement the related | Quentin Colombet | 2014-08-20 | 1 | -0/+21 |
* | [ARM] Mark VMOVDRR with the RegSequence property and implement the related | Quentin Colombet | 2014-08-11 | 1 | -0/+25 |
* | Remove the TargetMachine forwards for TargetSubtargetInfo based | Eric Christopher | 2014-08-04 | 1 | -3/+4 |
* | [ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly | Akira Hatanaka | 2014-08-02 | 1 | -3/+3 |
* | [stack protector] Fix a potential security bug in stack protector where the | Akira Hatanaka | 2014-07-25 | 1 | -0/+8 |
* | [C++11] Add 'override' keyword to virtual methods that override their base cl... | Craig Topper | 2014-03-10 | 1 | -3/+3 |
* | ARM: Use the PICADD opcode calculated. | Jim Grosbach | 2013-09-10 | 1 | -2/+6 |
* | ARM: Fix ELF global base reg intialization. | Jim Grosbach | 2013-08-26 | 1 | -3/+8 |
* | When initializing the PIC global base register on ARM/ELF add pc to fix the a... | Benjamin Kramer | 2013-08-16 | 1 | -0/+4 |
* | Create a constant pool symbol for the GOT in the ARMCGBR the same way we | Chandler Carruth | 2013-07-27 | 1 | -7/+8 |
* | Don't cache the instruction and register info from the TargetMachine, because | Bill Wendling | 2013-06-07 | 1 | -1/+1 |
* | Move all of the header files which are involved in modelling the LLVM IR | Chandler Carruth | 2013-01-02 | 1 | -2/+2 |
* | Move TargetData to DataLayout. | Micah Villmow | 2012-10-08 | 1 | -1/+1 |
* | [arm-fast-isel] Add support for ELF PIC. | Jush Lu | 2012-09-27 | 1 | -0/+62 |
* | ARM: Define generic HINT instruction. | Jim Grosbach | 2012-06-18 | 1 | -1/+2 |
* | ARM implement TargetInstrInfo::getNoopForMachoTarget() | Jim Grosbach | 2012-02-28 | 1 | -0/+17 |
* | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
* | invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons. We w... | Owen Anderson | 2011-08-26 | 1 | -2/+4 |
* | Split am2offset into register addend and immediate addend forms, necessary fo... | Owen Anderson | 2011-07-26 | 1 | -6/+12 |
* | Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A... | Evan Cheng | 2011-07-20 | 1 | -1/+1 |