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path: root/llvm/lib/Target/ARM/ARMISelLowering.cpp
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* Capitalize ArgListEntry fields. NFC.Nirav Dave2017-03-181-12/+12
* Revert "[Thumb1] Fix the bug when adding/subtracting -2147483648"Artyom Skrobov2017-03-151-4/+4
* [Thumb1] Fix the bug when adding/subtracting -2147483648Artyom Skrobov2017-03-151-4/+4
* [ARM] Enable SMLAL[B|T] iselSam Parker2017-03-151-5/+128
* [ARM] Move SMULW[B|T] isel to DAG CombineSam Parker2017-03-141-0/+113
* [Thumb1] combine ADDC/SUBC with a negative immediateArtyom Skrobov2017-03-131-0/+20
* Refactor the multiply-accumulate combines to act onArtyom Skrobov2017-03-101-76/+64
* For Thumb1, lower ADDC/ADDE/SUBC/SUBE via the glueless ARMISD nodes,Artyom Skrobov2017-03-101-12/+63
* [ARM] Reapply r296865 "[ARM] fpscr read/write intrinsics not aware of each ot...Ranjeet Singh2017-03-071-3/+4
* [ARM/AArch64] Support wide interleaved accessesMatthew Simpson2017-03-021-53/+140
* [ARM] don't transform an add(ext Cond), C to select unless there's a setcc of...Sanjay Patel2017-02-271-1/+1
* Fix PR31896.Evgeniy Stepanov2017-02-211-5/+8
* [ARM] Replace HasT2ExtractPack with HasDSPSam Parker2017-02-171-2/+2
* [ARM] Fix crash caused by r294945James Molloy2017-02-131-2/+4
* [ARM] Use VCMP, not VCMPE, for floating point equality comparisonsJames Molloy2017-02-131-13/+32
* [ARM] Don't lower f16 interleaved accesses.Ahmed Bougacha2017-02-111-0/+14
* [ARM/AArch ISel] SwiftCC: First parameters that are marked swiftself are not ...Arnold Schwaighofer2017-02-081-1/+2
* [ARM] Make RWPI use movw/movt when availableChristof Douma2017-02-071-8/+15
* [CodeGen] Remove dead call-or-prologue enum from CCStateReid Kleckner2017-02-021-30/+9
* [LV] Move interleaved access helper functions to VectorUtils (NFC)Matthew Simpson2017-02-011-14/+3
* Cleanup dump() functions.Matthias Braun2017-01-281-1/+1
* [ARM] Fix some Clang-tidy modernize and Include What You Use warnings; other ...Eugene Zelenko2017-01-271-46/+93
* ARM: fix vectorized division on WoASaleem Abdulrasool2017-01-271-2/+2
* [ARM] Use helpers for adding pred / CC operands. NFCDiana Picus2017-01-201-13/+17
* ARM: match GCC's behaviour for builtinsSaleem Abdulrasool2017-01-131-166/+16
* Apply clang-tidy's performance-unnecessary-value-param to LLVM.Benjamin Kramer2017-01-131-1/+1
* [ARM] CodeGen: Replace AddDefaultT1CC and AddNoT1CC. NFCDiana Picus2017-01-131-15/+15
* [ARM] CodeGen: Remove AddDefaultCC. NFC.Diana Picus2017-01-131-19/+26
* [CodeGen] Rename MachineInstrBuilder::addOperand. NFCDiana Picus2017-01-131-12/+12
* [ARM] CodeGen: Remove AddDefaultPred. NFC.Diana Picus2017-01-131-179/+241
* ARM: slightly more table driven libcall setupSaleem Abdulrasool2017-01-121-26/+59
* [ARM] More aggressive matching for vpadd and vpaddl.Eli Friedman2017-01-111-4/+104
* [ARM] Remove rbit intrinsics and autoupgrade to generic bitreverse.Chad Rosier2017-01-101-5/+0
* Caught a simple typo. I do not know of a way to test this, but it seems like ...Aaron Ballman2016-12-301-1/+1
* [ARM] Implement isExtractSubvectorCheap.Eli Friedman2016-12-201-0/+8
* [ARM] Add ARMISD::VLD1DUP to match vld1_dup more consistently.Eli Friedman2016-12-161-2/+32
* [ARM] Expose methods to get the CCAssignFn. NFCIDiana Picus2016-12-161-17/+18
* Revert 279703, it caused PR31404.Nico Weber2016-12-161-31/+2
* [ARM] Implement execute-only support in CodeGenPrakhar Bahuguna2016-12-151-9/+29
* [ARM] Split 128-bit vectors in BUILD_VECTOR loweringEli Friedman2016-12-141-0/+21
* [ARM] Add ARMISD::VLD1DUP to match vld1_dup more consistently.Eli Friedman2016-12-141-2/+31
* Generalize strided store pattern in interleave access passAlina Sbirlea2016-12-131-6/+36
* Move most EH from MachineModuleInfo to MachineFunctionMatthias Braun2016-12-011-3/+2
* Temporarily Revert "Move most EH from MachineModuleInfo to MachineFunction"Eric Christopher2016-12-011-2/+3
* Move most EH from MachineModuleInfo to MachineFunctionMatthias Braun2016-11-301-3/+2
* [ARM] Relax restriction on variadic functions for tailcall optimizationPablo Barrio2016-11-171-5/+0
* ARM: fix CodeGen for 64-bit shifts.Tim Northover2016-11-161-17/+31
* ARM: lower fpowi appropriately for Windows ARMSaleem Abdulrasool2016-11-061-0/+57
* [Cortex-M0] Atomic loweringWeiming Zhao2016-11-031-4/+13
* CodeGen: further loosen -O0 CG for WoA divisionSaleem Abdulrasool2016-10-311-5/+13
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