| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Last round of fixes for movw + movt global address codegen. | Evan Cheng | 2011-01-21 | 1 | -2/+5 |
| * | Sorry, several patches in one. | Evan Cheng | 2011-01-20 | 1 | -6/+1 |
| * | For ARM subtargets with useNEONForSinglePrecisionFP, double count uses | Andrew Trick | 2011-01-19 | 1 | -0/+16 |
| * | whitespace | Andrew Trick | 2011-01-19 | 1 | -16/+16 |
| * | Don't forget to emit the load from indirect symbol when using movw + movt to ... | Evan Cheng | 2011-01-19 | 1 | -1/+8 |
| * | Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g. | Evan Cheng | 2011-01-17 | 1 | -27/+47 |
| * | Fix 80-cols. | Eric Christopher | 2011-01-14 | 1 | -7/+14 |
| * | Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs a... | Anton Korobeynikov | 2011-01-10 | 1 | -2/+3 |
| * | Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. | Jakob Stoklund Olesen | 2011-01-10 | 1 | -1/+1 |
| * | Recognize inline asm 'rev /bin/bash, ' as a bswap intrinsic call. | Evan Cheng | 2011-01-08 | 1 | -0/+33 |
| * | Add an explanatory message for an assertion. | Bob Wilson | 2011-01-07 | 1 | -1/+2 |
| * | Eliminate variable only used in debug builds. | Matt Beaumont-Gay | 2011-01-07 | 1 | -3/+1 |
| * | Lower some BUILD_VECTORS using VEXT+shuffle. | Bob Wilson | 2011-01-07 | 1 | -2/+133 |
| * | Add ARM patterns to match EXTRACT_SUBVECTOR nodes. | Bob Wilson | 2011-01-07 | 1 | -1/+1 |
| * | Re-implement r122936 with proper target hooks. Now getMaxStoresPerMemcpy | Evan Cheng | 2011-01-06 | 1 | -1/+2 |
| * | Radar 8803471: Fix expansion of ARM BCCi64 pseudo instructions. | Bob Wilson | 2010-12-23 | 1 | -0/+3 |
| * | Add ARM-specific DAG combining to cast i64 vector element load/stores to f64. | Bob Wilson | 2010-12-21 | 1 | -5/+103 |
| * | rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for | Chris Lattner | 2010-12-21 | 1 | -9/+9 |
| * | Add some missing entries in ARMTargetLowering::getTargetNodeName. | Bob Wilson | 2010-12-18 | 1 | -0/+5 |
| * | Don't handle -arm-long-calls in fast isel for now. | Eric Christopher | 2010-12-15 | 1 | -1/+1 |
| * | bfi A, (and B, C1), C2) -> bfi A, B, C2 iff C1 & C2 == C1. rdar://8458663 | Evan Cheng | 2010-12-14 | 1 | -0/+20 |
| * | Generalize BFI isel lowering a bit. | Evan Cheng | 2010-12-13 | 1 | -29/+35 |
| * | (or (and (shl A, #shamt), mask), B) => ARMbfi B, A, ~mask where lsb(mask) == ... | Evan Cheng | 2010-12-11 | 1 | -7/+28 |
| * | PR5207: Change APInt methods trunc(), sext(), zext(), sextOrTrunc() and | Jay Foad | 2010-12-07 | 1 | -1/+1 |
| * | Fix and re-enable tail call optimization of expanded libcalls. | Evan Cheng | 2010-12-01 | 1 | -1/+4 |
| * | Enable sibling call optimization of libcalls which are expanded during | Evan Cheng | 2010-11-30 | 1 | -19/+54 |
| * | Add support for NEON VLD2-dup instructions. | Bob Wilson | 2010-11-28 | 1 | -7/+96 |
| * | Add entry in getTargetNodeName() for ARMISD::VBICIMM. | Bob Wilson | 2010-11-28 | 1 | -1/+2 |
| * | Recognize sign/zero-extended constant BUILD_VECTORs for VMULL operations. | Bob Wilson | 2010-11-23 | 1 | -13/+109 |
| * | Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept. | Wesley Peck | 2010-11-23 | 1 | -51/+51 |
| * | These instructions are thumb2 only. | Evan Cheng | 2010-11-19 | 1 | -1/+1 |
| * | Fix bug in DAGCombiner for ARM that was trying to do a ShiftCombine on illega... | Tanya Lattner | 2010-11-18 | 1 | -1/+2 |
| * | Move hasFP() and few related hooks to TargetFrameInfo. | Anton Korobeynikov | 2010-11-18 | 1 | -2/+4 |
| * | Split up ARM LowerShift function. | Bob Wilson | 2010-11-18 | 1 | -26/+33 |
| * | Fix an issue where we tried to turn a v2f32 build_vector into a v4i32 build v... | Nate Begeman | 2010-11-10 | 1 | -2/+2 |
| * | Do not use MEMBARRIER_MCR for any Thumb code. | Bob Wilson | 2010-11-09 | 1 | -2/+2 |
| * | Change the ARMConstantPoolValue modifier string to an enumeration. This will | Jim Grosbach | 2010-11-09 | 1 | -4/+4 |
| * | Add support for ARM's specialized vector-compare-against-zero instructions. | Owen Anderson | 2010-11-08 | 1 | -1/+32 |
| * | Disallow the certain NEON modified-immediate forms when generating vorr or vbic. | Owen Anderson | 2010-11-05 | 1 | -7/+14 |
| * | Add codegen and encoding support for the immediate form of vbic. | Owen Anderson | 2010-11-05 | 1 | -1/+34 |
| * | Fix @llvm.prefetch isel. Selecting between pld / pldw using the first immedia... | Evan Cheng | 2010-11-04 | 1 | -10/+11 |
| * | Covert VORRIMM to be produced via early target-specific DAG combining, rather... | Owen Anderson | 2010-11-03 | 1 | -31/+26 |
| * | Add support for code generation of the one register with immediate form of vorr. | Owen Anderson | 2010-11-03 | 1 | -0/+29 |
| * | Check for extractelement with a variable operand for the element number. | Bob Wilson | 2010-11-03 | 1 | -10/+15 |
| * | Simplify uses of MVT and EVT. An MVT can be compared directly | Duncan Sands | 2010-11-03 | 1 | -1/+1 |
| * | Fix preload instruction isel. Only v7 supports pli, and only v7 with mp exten... | Evan Cheng | 2010-11-03 | 1 | -4/+29 |
| * | Add support to match @llvm.prefetch to pld / pldw / pli. rdar://8601536. | Evan Cheng | 2010-11-03 | 1 | -0/+5 |
| * | NEON does not support truncating vector stores. Radar 8598391. | Bob Wilson | 2010-11-01 | 1 | -0/+4 |
| * | Overhaul memory barriers in the ARM backend. Radar 8601999. | Bob Wilson | 2010-10-30 | 1 | -12/+20 |
| * | - Don't schedule nodes with only MVT::Flag and MVT::Other values for latency. | Evan Cheng | 2010-10-29 | 1 | -3/+7 |
