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| author | Matt Beaumont-Gay <matthewbg@google.com> | 2011-01-07 22:34:58 +0000 |
|---|---|---|
| committer | Matt Beaumont-Gay <matthewbg@google.com> | 2011-01-07 22:34:58 +0000 |
| commit | 5cc7a1fcadaeca401212277323d565b2f141fdf7 (patch) | |
| tree | 6e2195f671904bbc990bd2a3288e0abad3affbfb /llvm/lib/Target/ARM/ARMISelLowering.cpp | |
| parent | acbee0b0d9a24d823a7af207762a7aa9ac7bbfd2 (diff) | |
| download | bcm5719-llvm-5cc7a1fcadaeca401212277323d565b2f141fdf7.tar.gz bcm5719-llvm-5cc7a1fcadaeca401212277323d565b2f141fdf7.zip | |
Eliminate variable only used in debug builds.
llvm-svn: 123040
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 98939732a2b..38daeaa5bbd 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -3712,12 +3712,10 @@ SDValue ARMTargetLowering::ReconstructShuffle(SDValue Op, SelectionDAG &DAG) con // break it down again in a shuffle. return SDValue(); } - - unsigned SrcNumElts = SourceVecs[i].getValueType().getVectorNumElements(); // Since only 64-bit and 128-bit vectors are legal on ARM and // we've eliminated the other cases... - assert(SrcNumElts == 2*NumElts); + assert(SourceVecs[i].getValueType().getVectorNumElements() == 2*NumElts); if (MaxElts[i] - MinElts[i] >= NumElts) { // Span too large for a VEXT to cope |
