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path: root/llvm/lib/Target/ARM/ARMISelLowering.cpp
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* Issue libcalls __udivmod*i4 / __divmod*i4 for div / rem pairs.Evan Cheng2011-04-011-0/+10
* Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplierEvan Cheng2011-03-311-0/+38
* Don't try to create zero-sized stack objects.Evan Cheng2011-03-301-2/+3
* Add a ARM-specific SD node for VBSL so that forms with a constant first operandCameron Zwarich2011-03-301-3/+32
* Add intrinsics @llvm.arm.neon.vmulls and @llvm.arm.neon.vmullu.* back. FrontendsEvan Cheng2011-03-291-0/+7
* Add Neon SINT_TO_FP and UINT_TO_FP lowering from v4i16 to v4f32. FixesCameron Zwarich2011-03-291-0/+35
* Optimizing (zext A + zext B) * C, to (VMULL A, C) + (VMULL B, C) during ...Evan Cheng2011-03-291-15/+81
* Fix the bfi handling for or (and a mask) (and b mask). We need the twoEric Christopher2011-03-261-9/+10
* Re-apply r127953 with fixes: eliminate empty return block if it has no predec...Evan Cheng2011-03-211-0/+10
* Revert r127953, "SimplifyCFG has stopped duplicating returns into predecessorsDaniel Dunbar2011-03-191-10/+0
* SimplifyCFG has stopped duplicating returns into predecessors to canonicalize IREvan Cheng2011-03-191-0/+10
* The VTBL (and VTBX) instructions are rather permissive concerning the masks theyBill Wendling2011-03-151-0/+8
* Some minor cleanups based on feedback.Bill Wendling2011-03-151-6/+4
* Generate a VTBL instruction instead of a series of loads and stores when weBill Wendling2011-03-141-1/+34
* Indentation.Evan Cheng2011-03-141-1/+1
* Fix a compiler crash where a Glue value had multiple uses. Radar 9049552.Bob Wilson2011-03-081-1/+22
* Fix comment typos.Bob Wilson2011-03-081-2/+2
* Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo.Cameron Zwarich2011-03-071-21/+0
* Remove unused conditional negate operations.Bob Wilson2011-03-051-1/+0
* Fix a typo which cause dag combine crash. rdar://9059537.Evan Cheng2011-02-281-1/+1
* Support for byval parameters on ARM. Will be enabled by a forthcomingStuart Hastings2011-02-281-9/+41
* More fcopysign correctness and performance fix.Evan Cheng2011-02-231-33/+63
* Revert r124611 - "Keep track of incoming argument's location while emitting L...Devang Patel2011-02-211-5/+5
* Implement sdiv & udiv for <4 x i16> and <8 x i8> NEON vector types.Nate Begeman2011-02-111-0/+182
* Fix buggy fcopysign lowering.Evan Cheng2011-02-111-5/+39
* Fix an obvious typo which caused an isel assertion. rdar://8964854.Evan Cheng2011-02-071-1/+1
* Add codegen support for using post-increment NEON load/store instructions.Bob Wilson2011-02-071-0/+176
* Given a pair of floating point load and store, if there are no other uses ofEvan Cheng2011-02-021-0/+5
* Keep track of incoming argument's location while emitting LiveIns.Devang Patel2011-01-311-5/+5
* Provide correct registers for EH stuff on ARMAnton Korobeynikov2011-01-241-3/+4
* Last round of fixes for movw + movt global address codegen.Evan Cheng2011-01-211-2/+5
* Sorry, several patches in one.Evan Cheng2011-01-201-6/+1
* For ARM subtargets with useNEONForSinglePrecisionFP, double count usesAndrew Trick2011-01-191-0/+16
* whitespaceAndrew Trick2011-01-191-16/+16
* Don't forget to emit the load from indirect symbol when using movw + movt to ...Evan Cheng2011-01-191-1/+8
* Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g.Evan Cheng2011-01-171-27/+47
* Fix 80-cols.Eric Christopher2011-01-141-7/+14
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs a...Anton Korobeynikov2011-01-101-2/+3
* Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.Jakob Stoklund Olesen2011-01-101-1/+1
* Recognize inline asm 'rev /bin/bash, ' as a bswap intrinsic call.Evan Cheng2011-01-081-0/+33
* Add an explanatory message for an assertion.Bob Wilson2011-01-071-1/+2
* Eliminate variable only used in debug builds.Matt Beaumont-Gay2011-01-071-3/+1
* Lower some BUILD_VECTORS using VEXT+shuffle.Bob Wilson2011-01-071-2/+133
* Add ARM patterns to match EXTRACT_SUBVECTOR nodes.Bob Wilson2011-01-071-1/+1
* Re-implement r122936 with proper target hooks. Now getMaxStoresPerMemcpyEvan Cheng2011-01-061-1/+2
* Radar 8803471: Fix expansion of ARM BCCi64 pseudo instructions.Bob Wilson2010-12-231-0/+3
* Add ARM-specific DAG combining to cast i64 vector element load/stores to f64.Bob Wilson2010-12-211-5/+103
* rename MVT::Flag to MVT::Glue. "Flag" is a terrible name forChris Lattner2010-12-211-9/+9
* Add some missing entries in ARMTargetLowering::getTargetNodeName.Bob Wilson2010-12-181-0/+5
* Don't handle -arm-long-calls in fast isel for now.Eric Christopher2010-12-151-1/+1
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