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path: root/llvm/lib/Target/ARM/ARMISelLowering.cpp
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* Use the integer compare when the value is small enough. Use the "move into aBill Wendling2011-10-181-2/+17
* Use the integer compare when the value is small enough. Use the "move into aBill Wendling2011-10-181-6/+19
* The value we're comparing against may be too large for the ARM CMPBill Wendling2011-10-181-12/+16
* The immediate may be too large for the CMP instruction. Move it into a registerBill Wendling2011-10-181-8/+13
* Use ARM/t2PseudoInst class from ARM/Thumb2 special adds/subs patterns.Andrew Trick2011-10-181-7/+15
* Use isIntN and isUIntN to check for valid signed/unsigned numbers.Bob Wilson2011-10-181-3/+2
* whitespaceAndrew Trick2011-10-181-6/+6
* A landing pad could have more than one predecessor. In that case, we want thatBill Wendling2011-10-181-1/+8
* Fix incorrect check for sign-extended constant BUILD_VECTOR.Bob Wilson2011-10-181-1/+1
* Fix a bunch of unused variable warnings when doing a releaseDuncan Sands2011-10-181-2/+2
* Don't renumber the blocks here. This could cause problems later on if anotherBill Wendling2011-10-171-3/+1
* Add a call to EmitSjLjDispatchBlock.Bill Wendling2011-10-171-0/+8
* Add comment explaining that the order of processing doesn't matter here.Bill Wendling2011-10-171-0/+1
* ARM cannot select a pattern for trunc-store v4i8; /ARM/vrev.ll fails when pro...Nadav Rotem2011-10-151-0/+2
* Mark registers as DEAD because they're really just clobbers.Bill Wendling2011-10-151-1/+1
* Add missing correctness check to ARMTargetLowering::ReconstructShuffle. Fixe...Eli Friedman2011-10-141-0/+8
* Make sure that the register is in the register class before adding it as a ma...Bill Wendling2011-10-141-1/+3
* Mark the invoke call instruction as implicitly defining the callee-saved regi...Bill Wendling2011-10-141-2/+31
* Simplify and avoid undefined shift. Based on patch by Ahmed Charles.Eli Friedman2011-10-131-2/+1
* Reapply r141365 now that PR11107 is fixed.Bill Wendling2011-10-101-0/+80
* Revert r141365. It was causing MultiSource/Benchmarks/MiBench/consumer-lame toBill Wendling2011-10-101-80/+0
* Take all of the invoke basic blocks and make the dispatch basic block their newBill Wendling2011-10-071-4/+28
* Take the code that was emitted for the llvm.eh.dispatch.setup intrinsic and emitBill Wendling2011-10-071-0/+49
* Thread the chain through the eh.sjlj.setjmp intrinsic, like it's documented toBill Wendling2011-10-071-1/+2
* Reenable tail calls for iOS 5.0 and later.Bob Wilson2011-10-071-2/+2
* Reenable use of divmod compiler_rt functions for iOS 5.0 and later.Bob Wilson2011-10-071-0/+7
* Peephole optimization for ABS on ARM.Anton Korobeynikov2011-10-071-0/+80
* Use the correct vreg here.Bill Wendling2011-10-061-1/+1
* Generate the dispatch code for a 'thumb' function. This is very similar to theBill Wendling2011-10-061-2/+53
* Generate the dispatch table for ARM mode.Bill Wendling2011-10-061-29/+71
* Refactor some of the code that sets up the entry block for SjLj EH. No functi...Bill Wendling2011-10-061-79/+101
* Use a thumb ORR instead of thumb2 ORR when in thumb-only mode. (Picky! Picky!)Bill Wendling2011-10-061-7/+12
* * Set the low bit of the return address when we are in thumb mode.Bill Wendling2011-10-061-73/+90
* Add the MBBs before inserting the instructions. Doing it afterwards could leadBill Wendling2011-10-061-28/+10
* Get the proper call site numbers for the landing pads. Also remove a magicBill Wendling2011-10-051-15/+27
* Look at the number of entries in the jump table and jump to a 'trap' block ifBill Wendling2011-10-051-14/+50
* Checkpoint for SJLJ EH code.Bill Wendling2011-10-051-3/+75
* Use the PC label ID rather than '1'. Add support for thumb-2, because I heard...Bill Wendling2011-10-031-10/+41
* Check-pointing the new SjLj EH lowering.Bill Wendling2011-10-031-0/+74
* Use the new ARMConstantPoolSymbol class to handle external symbols.Bill Wendling2011-10-011-7/+9
* Switch over to using ARMConstantPoolConstant for global variables, functions,Bill Wendling2011-10-011-18/+21
* ARM fix encoding of VMOV.f32 and VMOV.f64 immediates.Jim Grosbach2011-09-301-46/+2
* Tighten a ARM dag combine condition to avoid an identity transformation, whichEvan Cheng2011-09-281-1/+1
* PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 201...David Meyer2011-09-261-1/+3
* Lower ARM adds/subs to add/sub after adding optional CPSR operand.Andrew Trick2011-09-211-26/+26
* ARM isel bug fix for adds/subs operands.Andrew Trick2011-09-201-16/+57
* whitespaceAndrew Trick2011-09-201-13/+13
* Thumb2 assembly parsing and encoding for STR.Jim Grosbach2011-09-161-0/+13
* Minor cleanup.Eli Friedman2011-09-151-3/+2
* Use a more efficient lowering for Unordered/Monotonic atomic load/store on Th...Eli Friedman2011-09-151-2/+18
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