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path: root/llvm/lib/Target/ARM/ARMFastISel.cpp
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* Don't unconditionally set the kill flag.Chad Rosier2011-11-171-1/+1
| | | | | | rdar://10456186 llvm-svn: 144872
* Check to make sure we can select the instruction before trying to put theChad Rosier2011-11-161-6/+6
| | | | | | operands into a register. Otherwise, we may materialize dead code. llvm-svn: 144805
* Add FIXME comment.Chad Rosier2011-11-161-0/+2
| | | | llvm-svn: 144743
* Remove some unnecessary includes of PseudoSourceValue.h.Jay Foad2011-11-151-1/+0
| | | | llvm-svn: 144631
* Supporting inline memmove isn't going to be worthwhile. The only way to avoidChad Rosier2011-11-141-16/+9
| | | | | | | violating a dependency is to emit all loads prior to stores. This would likely cause a great deal of spillage offsetting any potential gains. llvm-svn: 144585
* Add support for inlining small memcpys.Chad Rosier2011-11-141-2/+63
| | | | | | rdar://10412592 llvm-svn: 144578
* Fix a performance regression from r144565. Positive offsets were being loweredChad Rosier2011-11-141-3/+3
| | | | | | into registers, rather then encoded directly in the load/store. llvm-svn: 144576
* Add support for Thumb load/stores with negative offsets.Chad Rosier2011-11-141-16/+60
| | | | | | rdar://10412592 llvm-svn: 144565
* Add support for ARM halfword load/stores and signed byte loads with negativeChad Rosier2011-11-141-8/+15
| | | | | | | offsets. rdar://10412592 llvm-svn: 144518
* The order in which the predicate is added differs between Thumb and ARM ↵Chad Rosier2011-11-131-10/+16
| | | | | | mode. Fix predicate when in ARM mode and restore SelectIntrinsicCall. llvm-svn: 144494
* Temporarily disable SelectIntrinsicCall when in ARM mode. This is causing ↵Chad Rosier2011-11-131-0/+1
| | | | | | failures. llvm-svn: 144492
* Fix comments.Chad Rosier2011-11-131-3/+3
| | | | llvm-svn: 144490
* Add support for emitting both signed- and zero-extend loads. Fix Chad Rosier2011-11-131-32/+91
| | | | | | | | | | | | | SimplifyAddress to handle either a 12-bit unsigned offset or the ARM +/-imm8 offsets (addressing mode 3). This enables a load followed by an integer extend to be folded into a single load. For example: ldrb r1, [r0] ldrb r1, [r0] uxtb r2, r1 => mov r3, r2 mov r3, r1 llvm-svn: 144488
* Add support in fast-isel for selecting memset/memcpy/memmove intrinsics.Chad Rosier2011-11-111-10/+60
| | | | llvm-svn: 144426
* Rename variables to avoid confusion. No functionallity change intended.Chad Rosier2011-11-111-18/+18
| | | | llvm-svn: 144377
* Add support for using immediates with select instructions.Chad Rosier2011-11-111-8/+40
| | | | | | rdar://10412592 llvm-svn: 144376
* When loading a value, treat an i1 as an i8.Chad Rosier2011-11-111-0/+1
| | | | llvm-svn: 144356
* Add support for using MVN to materialize negative constants.Chad Rosier2011-11-111-3/+17
| | | | | | rdar://10412592 llvm-svn: 144348
* When in ARM mode, LDRH/STRH require special handling of negative offsets.Chad Rosier2011-11-101-1/+2
| | | | | | | For correctness, disable this for now. rdar://10418009 llvm-svn: 144316
* For immediate encodings of icmp, zero or sign extend first. ThenChad Rosier2011-11-101-5/+5
| | | | | | | determine if the value is negative and flip the sign accordingly. rdar://10422026 llvm-svn: 144258
* The ARM LDRH/STRH instructions use a +/-imm8 encoding, not an imm12.Chad Rosier2011-11-091-5/+13
| | | | | | rdar://10418009 llvm-svn: 144213
* Add support for encoding immediates in icmp and fcmp. Hopefully, this willChad Rosier2011-11-091-12/+64
| | | | | | | remove a fair number of unnecessary materialized constants. rdar://10412592 llvm-svn: 144163
* ARMFastISel doesn't support thumb1. Rename isThumb to isThumb2 to reflect this.Chad Rosier2011-11-081-39/+39
| | | | | | No functional change intended. llvm-svn: 144122
* Enable support for returning i1, i8, and i16. Nothing special todo as it's theChad Rosier2011-11-081-1/+7
| | | | | | | | callee's responsibility to sign or zero-extend the return value. The additional test case just checks to make sure the calls are selected (i.e., -fast-isel-abort doesn't assert). llvm-svn: 144047
* Add support for passing i1, i8, and i16 call parameters. Also, be sure toChad Rosier2011-11-051-28/+16
| | | | | | | zero-extend the constant integer encoding. Test case provides testing for both call parameters and materialization of i1, i8, and i16 types. llvm-svn: 143821
* Cannot create a result register for non-legal types.Chad Rosier2011-11-041-1/+2
| | | | llvm-svn: 143749
* When materializing an i32, SExt vs ZExt doesn't matter when we're trying to fitChad Rosier2011-11-041-1/+1
| | | | | | | | in a 16-bit immediate. However, for the shorter non-legal types (i.e., i1, i8, i16) we should not sign-extend. This prevents us from materializing things such as 'true' (i.e., i1 1). llvm-svn: 143743
* Enable support for materializing i1, i8, and i16 integers via move immediate.Chad Rosier2011-11-041-6/+11
| | | | llvm-svn: 143739
* Indentation.Chad Rosier2011-11-041-1/+1
| | | | llvm-svn: 143670
* Add fast-isel support for returning i1, i8, and i16.Chad Rosier2011-11-041-6/+19
| | | | llvm-svn: 143669
* Add support for sign-extending non-legal types in SelectSIToFP().Chad Rosier2011-11-031-5/+14
| | | | llvm-svn: 143603
* Add support for comparing integer non-legal types.Chad Rosier2011-11-021-16/+33
| | | | llvm-svn: 143559
* Factor out an EmitIntExt function. No functionality change intended.Chad Rosier2011-11-021-31/+37
| | | | llvm-svn: 143547
* Factor out a SelectTrunc function. No functionality change intended.Chad Rosier2011-11-021-17/+28
| | | | llvm-svn: 143523
* A branch predicated on a constant can just FastEmit an unconditional branch.Chad Rosier2011-10-271-0/+6
| | | | llvm-svn: 143086
* Add a TODO comment. FastISel works by parsing each basic block from the bottomChad Rosier2011-10-261-0/+1
| | | | | | | | up. Thus, improving the support for compares is goodness because it increases the number of terminator instructions we can handle. This creates many more opportunities for target specific fast-isel. llvm-svn: 143079
* Factor a little more code into EmitCmp, which should have been done in the firstChad Rosier2011-10-261-23/+16
| | | | | | place. No functional change intended. llvm-svn: 143078
* Use EmitCmp in SelectBranch. No functional change intended.Chad Rosier2011-10-261-33/+6
| | | | llvm-svn: 143076
* Factor out an EmitCmp function that can be used by both SelectCmp andChad Rosier2011-10-261-18/+24
| | | | | | SelectBranch. No functional change intended. llvm-svn: 143072
* Add a few FIXME comments.Chad Rosier2011-10-171-0/+2
| | | | llvm-svn: 142299
* Switch over to using ARMConstantPoolConstant for global variables, functions,Bill Wendling2011-10-011-2/+3
| | | | | | and block addresses. llvm-svn: 140936
* ARM fix encoding of VMOV.f32 and VMOV.f64 immediates.Jim Grosbach2011-09-301-2/+10
| | | | | | | | | | | Encode the immediate into its 8-bit form as part of isel rather than later, which simplifies things for mapping the encoding bits, allows the removal of the custom disassembler decoding hook, makes the operand printer trivial, and prepares things more cleanly for handling these in the asm parser. rdar://10211428 llvm-svn: 140834
* Tidy up a few 80 column violations.Jim Grosbach2011-09-131-3/+3
| | | | llvm-svn: 139636
* Don't fast-isel for atomic load/store; some cases require extra handling ↵Eli Friedman2011-09-021-0/+8
| | | | | | missing from fast-isel. llvm-svn: 139044
* Fixup for functions that return a bool.Chad Rosier2011-08-311-2/+2
| | | | llvm-svn: 138918
* [SU]XT[BH] are only available on ARMv6 and up.Jim Grosbach2011-08-231-0/+2
| | | | llvm-svn: 138373
* ARM extend instructions simplification.Jim Grosbach2011-07-271-4/+6
| | | | | | | | Refactor the SXTB, SXTH, SXTB16, UXTB, UXTH, and UXTB16 instructions to not have an 'r' and an 'r_rot' version, but just a single version with a rotate that can be zero. Use plain Pat<>'s for the ISel of the non-rotated version. llvm-svn: 136225
* Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ↵Evan Cheng2011-07-201-1/+1
| | | | | | ARM MC code from target. llvm-svn: 135636
* land David Blaikie's patch to de-constify Type, with a few tweaks.Chris Lattner2011-07-181-22/+22
| | | | llvm-svn: 135375
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-281-2/+2
| | | | llvm-svn: 134030
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