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authorChad Rosier <mcrosier@apple.com>2011-11-17 01:16:53 +0000
committerChad Rosier <mcrosier@apple.com>2011-11-17 01:16:53 +0000
commitce619ddfc5446dbd51f134f7ddb8acc71f8bb83d (patch)
treee1b8e27947f9430c51f9e3abc723b3875ca52c17 /llvm/lib/Target/ARM/ARMFastISel.cpp
parentdf6ca9fbee82aa73e6cd3b6096dd68319d5bdc19 (diff)
downloadbcm5719-llvm-ce619ddfc5446dbd51f134f7ddb8acc71f8bb83d.tar.gz
bcm5719-llvm-ce619ddfc5446dbd51f134f7ddb8acc71f8bb83d.zip
Don't unconditionally set the kill flag.
rdar://10456186 llvm-svn: 144872
Diffstat (limited to 'llvm/lib/Target/ARM/ARMFastISel.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMFastISel.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index de13a295fa0..8837c735843 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -1114,7 +1114,7 @@ bool ARMFastISel::ARMEmitStore(EVT VT, unsigned SrcReg, Address &Addr) {
// Create the base instruction, then add the operands.
MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(StrOpc))
- .addReg(SrcReg, getKillRegState(true));
+ .addReg(SrcReg);
AddLoadStoreOperands(VT, Addr, MIB, MachineMemOperand::MOStore, useAM3);
return true;
}
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