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| author | Chad Rosier <mcrosier@apple.com> | 2011-11-16 18:39:44 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@apple.com> | 2011-11-16 18:39:44 +0000 |
| commit | 80979b6ea6a3bef6b6e74b78798e2ee1d72b325f (patch) | |
| tree | 272fcfc79ff355211298ddb4754613c5fc536639 /llvm/lib/Target/ARM/ARMFastISel.cpp | |
| parent | 624eb2af6f38736de128d3a94da4c1ab8dbd8c77 (diff) | |
| download | bcm5719-llvm-80979b6ea6a3bef6b6e74b78798e2ee1d72b325f.tar.gz bcm5719-llvm-80979b6ea6a3bef6b6e74b78798e2ee1d72b325f.zip | |
Check to make sure we can select the instruction before trying to put the
operands into a register. Otherwise, we may materialize dead code.
llvm-svn: 144805
Diffstat (limited to 'llvm/lib/Target/ARM/ARMFastISel.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMFastISel.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp index 96e2b7062e6..de13a295fa0 100644 --- a/llvm/lib/Target/ARM/ARMFastISel.cpp +++ b/llvm/lib/Target/ARM/ARMFastISel.cpp @@ -1670,12 +1670,6 @@ bool ARMFastISel::SelectBinaryOp(const Instruction *I, unsigned ISDOpcode) { if (isFloat && !Subtarget->hasVFP2()) return false; - unsigned Op1 = getRegForValue(I->getOperand(0)); - if (Op1 == 0) return false; - - unsigned Op2 = getRegForValue(I->getOperand(1)); - if (Op2 == 0) return false; - unsigned Opc; bool is64bit = VT == MVT::f64 || VT == MVT::i64; switch (ISDOpcode) { @@ -1690,6 +1684,12 @@ bool ARMFastISel::SelectBinaryOp(const Instruction *I, unsigned ISDOpcode) { Opc = is64bit ? ARM::VMULD : ARM::VMULS; break; } + unsigned Op1 = getRegForValue(I->getOperand(0)); + if (Op1 == 0) return false; + + unsigned Op2 = getRegForValue(I->getOperand(1)); + if (Op2 == 0) return false; + unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), ResultReg) |
