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path: root/llvm/lib/Target/ARM/ARMCodeEmitter.cpp
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* Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a stepEvan Cheng2011-01-131-1/+1
* Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755Jim Grosbach2010-12-141-0/+2
* The tLDR et al instructions were emitting either a reg/reg or reg/immBill Wendling2010-12-141-1/+3
* Second attempt at make Thumb2 LEAs pseudos. This time, perform the lowering ...Owen Anderson2010-12-141-0/+2
* Revert r121721, which broke buildbots.Owen Anderson2010-12-131-2/+0
* Make Thumb2 LEA-like instruction into pseudos, which map down to ADR. Provid...Owen Anderson2010-12-131-0/+2
* In Thumb2, direct branches can be encoded as either a "short" conditional bra...Owen Anderson2010-12-131-0/+2
* Fix encoding of Thumb1 LDRB and STRB.Owen Anderson2010-12-101-0/+2
* Thumb unconditional branch binary encoding. rdar://8754994Jim Grosbach2010-12-101-0/+2
* Thumb conditional branch binary encodings. rdar://8745367Jim Grosbach2010-12-101-0/+2
* Thumb ldr reg+imm offsets were encoded incorrectly. The scaling factor of theBill Wendling2010-12-091-5/+1
* Rename the encoder method for t_cbtarget to match.Jim Grosbach2010-12-091-1/+1
* The BLX instruction is encoded differently than the BL, because why not? InBill Wendling2010-12-091-0/+2
* Support the "target" encodings for the CB[N]Z instructions.Bill Wendling2010-12-081-0/+2
* Add support for loading from a constant pool.Bill Wendling2010-12-081-0/+2
* Binary encoding for ARM tLDRspi and tSTRspi.Jim Grosbach2010-12-071-0/+2
* Add fixup for Thumb1 BL/BLX instructions.Jim Grosbach2010-12-061-0/+2
* Add a post encoder method to the VFP instructions to convert them to the Thumb2Bill Wendling2010-12-011-0/+2
* Refactor LEApcrelJT as a pseudo-instructionlowered to a cannonical ADRJim Grosbach2010-12-011-0/+2
* Add correct encodings for STRD and LDRD, including fixup support. Additional...Owen Anderson2010-12-011-0/+2
* * Add support for encoding t_addrmode_s2 and t_addrmode_s1. They are the same asBill Wendling2010-11-301-0/+4
* Add encoding support for Thumb2 PLD and PLI instructions.Owen Anderson2010-11-301-0/+2
* Add parsing for the Thumb t_addrmode_s4 addressing mode. This can almostBill Wendling2010-11-301-2/+4
* Rename BX/BRIND/etc patterns to clarify which is actually the BX instructionJim Grosbach2010-11-301-4/+4
* Correct Thumb2 encodings for a much wider range of loads and stores.Owen Anderson2010-11-301-0/+2
* Fix the encoding of VLD4-dup alignment.Bob Wilson2010-11-301-0/+2
* Provide Thumb2 encodings for basic loads and stores.Owen Anderson2010-11-291-0/+6
* Have the getAddrMode3OpValue() function in ARMCodeEmitter.cpp produce the sameBill Wendling2010-11-201-9/+21
* Minor cleanups to a few llvm_unreachable() calls.Jim Grosbach2010-11-191-6/+2
* Fix .o emission of ARM movt/movw. MCSymbolRefExpr::VK_ARM_(HI||LO)16 for the ...Jason W Kim2010-11-181-0/+5
* Clean up LEApcrel instuction(s) a bit. It's not really a Pseudo, so don't markJim Grosbach2010-11-171-0/+8
* Fix comment typo.Jim Grosbach2010-11-171-1/+1
* The machine instruction no longer encodes the submode as a separate operand. WeBill Wendling2010-11-171-4/+4
* ARM LDR_PRE/LDR_POST/STR_PRE/STR_POST (and the *B counterparts) binary encoding.Jim Grosbach2010-11-151-0/+4
* Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either movi+o...Evan Cheng2010-11-121-5/+5
* First stab at providing correct Thumb2 encodings, start with adc.Owen Anderson2010-11-121-0/+4
* Fill out support for Thumb2 encodings of NEON instructions.Owen Anderson2010-11-111-0/+2
* Add correct Thumb2 encodings for NEON vst[1,2,3,4] and vld[1,2,3,4].Owen Anderson2010-11-111-0/+2
* Add support for Thumb2 encodings of NEON data processing instructions, using ...Owen Anderson2010-11-111-0/+2
* Encoding of destination fixup for ARM branch and conditional branchJim Grosbach2010-11-111-0/+2
* Encoding for ARM LDRSH_POST.Jim Grosbach2010-11-111-0/+2
* ARM STRH encoding information.Jim Grosbach2010-11-111-0/+2
* ARM LDM encoding for the mode (ia, ib, da, db) operand.Jim Grosbach2010-11-101-0/+2
* Add encoder method for ARM load/store shifted register offset operands.Jim Grosbach2010-11-091-0/+2
* The MC code couldn't handle ARM LDR instructions with negative offsets:Bill Wendling2010-11-031-11/+30
* Rename getAddrModeImm12OpValue to getAddrModeImmOpValue and expand it to workBill Wendling2010-11-021-19/+20
* Rename encoder methods to match naming convention.Owen Anderson2010-11-021-5/+2
* Add correct NEON encodings for vld2, vld3, and vld4 basic variants.Owen Anderson2010-11-021-0/+3
* Add correct NEON encodings for the "multiple single elements" form of vld.Owen Anderson2010-11-021-1/+4
* Encode the register list operands for ARM mode LDM/STM instructions.Jim Grosbach2010-10-301-0/+3
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