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path: root/llvm/lib/Target/ARM/ARMCallingConv.h
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* Add Windows Control Flow Guard checks (/guard:cf).Andrew Paverd2019-10-281-0/+3
* [ARM] Deduplicate table generated CC analysis codeReid Kleckner2019-01-281-271/+30
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [ARM] Fix over-alignment in arguments that are HA of 128-bit vectorsPetr Pavlu2018-07-301-5/+6
* [ARM] Support for v4f16 and v8f16 vectorsSjoerd Meijer2018-03-191-0/+3
* Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie2017-11-081-1/+1
* Update to use new name alignTo().Rui Ueyama2016-01-141-1/+1
* Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical...Craig Topper2015-12-051-9/+9
* ARM: add backend support for the ABI used in WatchOSTim Northover2015-10-281-1/+3
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-231-1/+1
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-191-1/+1
* ARM: treat [N x i32] and [N x i64] as AAPCS composite typesTim Northover2015-02-241-56/+91
* CodeGen: convert CCState interface to using ArrayRefsTim Northover2015-02-211-5/+5
* Stop using ArrayRef of a const type.Tim Northover2014-11-271-1/+1
* AArch64: treat [N x Ty] as a block during procedure calls.Tim Northover2014-11-271-6/+2
* [ARM] Enable DP copy, load and store instructions for FPv4-SPOliver Stannard2014-08-211-13/+4
* Canonicalize header guards into a common format.Benjamin Kramer2014-08-131-2/+2
* ARM: teach AAPCS-VFP to deal with Cortex-M4.Tim Northover2014-05-271-4/+13
* ARM: HFAs must be passed in consecutive registersOliver Stannard2014-05-091-0/+90
* Make consistent use of MCPhysReg instead of uint16_t throughout the tree.Craig Topper2014-04-041-7/+7
* Fix for 5.5 Parameter Passing --> Stage C:Stepan Dyatkovskiy2013-04-221-0/+6
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-1/+1
* Prune includes and replace uses of ARMRegisterInfo.h with ARMBaeRegisterInfo.hCraig Topper2012-03-261-1/+0
* Reorder includes to match coding standards. Fix an issue or two exposed by that.Craig Topper2012-03-171-4/+4
* Convert more static tables of registers used by calling convention to uint16_...Craig Topper2012-03-111-6/+6
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* In the calling convention logic, ValVT is always a legal type,Duncan Sands2010-11-041-7/+7
* Inside the calling convention logic LocVT is always a simpleDuncan Sands2010-11-031-7/+7
* Newline at end of file.Eric Christopher2010-09-101-1/+1
* Split out some of the calling convention bits so that they can beEric Christopher2010-09-101-0/+160
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