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path: root/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
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* [ARM] Use the efficient version of BitVector::set and a static_assert.Benjamin Kramer2016-01-141-3/+2
* CXX_FAST_TLS calling convention: performance improvement for ARM.Manman Ren2016-01-121-1/+12
* CXX_FAST_TLS calling convention: Add support for ARM on Darwin.Manman Ren2016-01-111-0/+4
* ARM: support TLS accesses on Darwin platformsTim Northover2016-01-071-0/+8
* Targets: commonize some stack realignment codeJF Bastien2015-07-201-13/+1
* TargetRegisterInfo: Provide a way to check assigned registers in getRegAlloca...Matthias Braun2015-07-151-1/+2
* Target RegisterInfo: devirtualize TargetFrameLoweringJF Bastien2015-07-101-10/+10
* ARM: Handle physreg targets in RegPair hints gracefullyMatthias Braun2015-04-031-6/+15
* [ARM] Fix handling of thumb1 out-of-range frame offsetsJohn Brawn2015-03-201-5/+4
* [ARM] Fix offset calculation in ARMBaseRegisterInfo::needsFrameBaseRegRichard Barton2015-03-171-1/+0
* Remove the need to cache the subtarget in the ARM TargetRegisterInfoEric Christopher2015-03-121-12/+20
* Have getCallPreservedMask and getThisCallPreservedMask take aEric Christopher2015-03-111-4/+6
* Have getCalleeSavedRegs take a non-null MachineFunction all theEric Christopher2015-03-111-2/+0
* Have TargetRegisterInfo::getLargestLegalSuperClass take aEric Christopher2015-03-101-3/+3
* Remove dead code.Eric Christopher2015-03-101-23/+0
* Improve handling of stack accesses in Thumb-1Renato Golin2015-02-251-3/+4
* Rename UpdateRegAllocHint to match style guidelines.Eric Christopher2015-02-241-1/+1
* ARM: Canonicalize access to function attributes, NFCDuncan P. N. Exon Smith2015-02-141-4/+2
* Migrate ARM except for TTI, AsmPrinter, and frame loweringEric Christopher2015-01-291-8/+3
* ARM: convert isTargetIOS checks to isTargetDarwin.Tim Northover2014-12-111-7/+5
* ARM: rework Thumb1 frame index rewritingTim Northover2014-10-201-4/+4
* Revert 202433 - Provide a target override for the latest regalloc heuristicRenato Golin2014-10-031-5/+0
* ARM: allow copying of CPSR when all else fails.Tim Northover2014-10-011-1/+1
* Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher2014-08-051-19/+10
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-13/+28
* [RegisterCoalescer] Moving the RegisterCoalescer subtarget hook onto the Targ...Chris Bieneman2014-07-161-0/+59
* ARM: use AAPCS-style prologues for embedded MachO.Tim Northover2014-05-301-3/+6
* ARM: improve WoA ABI conformance for frame registerSaleem Abdulrasool2014-05-181-3/+7
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-2/+2
* Make consistent use of MCPhysReg instead of uint16_t throughout the tree.Craig Topper2014-04-041-2/+2
* Simplify resolveFrameIndex() signature.Jim Grosbach2014-04-021-4/+2
* Provide a target override for the latest regalloc heuristic.Andrew Trick2014-02-271-0/+5
* Revert r200095 and r200152. It turns out when compiling with -arch armv7 -mcp...Evan Cheng2014-02-061-3/+4
* Follow up of r200095. Code clean up.Evan Cheng2014-01-261-1/+1
* Clean up hack which is no longer needed after r198617. No functionality change.Evan Cheng2014-01-251-3/+2
* ARM MachO: sort out isTargetDarwin/isTargetIOS/... checks.Tim Northover2014-01-061-1/+1
* Remove getEHExceptionRegister and getEHHandlerRegister.Rafael Espindola2013-10-071-8/+0
* ARM: support interrupt attributeTim Northover2013-10-011-11/+25
* Use function attributes to indicate that we don't want to realign the stack.Bill Wendling2013-08-011-1/+1
* Have ARMBaseRegisterInfo::getCallPreservedMask return the 'correct' mask for ...Stephen Lin2013-07-031-4/+13
* Clarify and doxygen-ify commentsStephen Lin2013-06-261-8/+12
* ARM: Proactively ensure that the LowerCallResult hack for 'this'-returns is n...Stephen Lin2013-06-261-0/+3
* Minor formatting fix to ARMBaseRegisterInfo::getCalleeSavedRegsStephen Lin2013-06-261-7/+5
* Debug Info: Simplify Frame Index handling in DBG_VALUE Machine InstructionsDavid Blaikie2013-06-161-6/+1
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-5/+10
* The purpose of the patch is to fix the syntax of ARM mrc and mrc2 instruction...Mihai Popa2013-05-131-0/+1
* Add CodeGen support for functions that always return arguments via a new para...Stephen Lin2013-04-201-0/+6
* Allow the register scavenger to spill multiple registersHal Finkel2013-03-221-1/+1
* Move the eliminateCallFramePseudoInstr method from TargetRegisterInfoEli Bendersky2013-02-211-58/+0
* ARM: Allocation hints must make sure to be in the alloc order.Jim Grosbach2013-02-191-1/+2
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