| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | Move -widen-vmovs to ARMBaseInstrInfo::expandPostRAPseudo(). | Jakob Stoklund Olesen | 2011-10-11 | 1 | -30/+42 |
| * | Use the ARMConstantPoolMBB class to handle the MBB values. | Bill Wendling | 2011-10-01 | 1 | -3/+3 |
| * | Use the new ARMConstantPoolSymbol class to handle external symbols. | Bill Wendling | 2011-10-01 | 1 | -2/+3 |
| * | Switch over to using ARMConstantPoolConstant for global variables, functions, | Bill Wendling | 2011-10-01 | 1 | -6/+8 |
| * | Create a machine basic block in the constant pool and retrieve the symbol for... | Bill Wendling | 2011-09-29 | 1 | -0/+4 |
| * | Use ExecutionDepsFix instead of NEONMoveFix. | Jakob Stoklund Olesen | 2011-09-29 | 1 | -10/+20 |
| * | Implement TII::get/setExecutionDomain() for ARM. | Jakob Stoklund Olesen | 2011-09-27 | 1 | -0/+53 |
| * | Lower ARM adds/subs to add/sub after adding optional CPSR operand. | Andrew Trick | 2011-09-21 | 1 | -0/+60 |
| * | whitespace | Andrew Trick | 2011-09-21 | 1 | -4/+4 |
| * | Fix an ambiguously nested if. | Owen Anderson | 2011-09-09 | 1 | -2/+2 |
| * | Thumb unconditional branches are allowed in IT blocks, and therefore should h... | Owen Anderson | 2011-09-09 | 1 | -3/+10 |
| * | Put VMOVS widening under a command line option, off by default. | Jakob Stoklund Olesen | 2011-08-31 | 1 | -1/+6 |
| * | Clean up Thumb load/store multiple definitions. | Jim Grosbach | 2011-08-23 | 1 | -2/+0 |
| * | Remove the VMOVQQ pseudo instruction. | Chad Rosier | 2011-08-20 | 1 | -8/+8 |
| * | Add <imp-def> operands to QQ and QQQQ stack loads. | Jakob Stoklund Olesen | 2011-08-20 | 1 | -2/+4 |
| * | VMOVQQQQs pseudo instructions are only created by ARMBaseInstrInfo::copyPhysReg. | Chad Rosier | 2011-08-20 | 1 | -10/+31 |
| * | Rewrite some ARM InstrInfo functions to be most accepting of arbitrary regist... | Owen Anderson | 2011-08-10 | 1 | -110/+115 |
| * | Promote VMOVS to VMOVD when possible. | Jakob Stoklund Olesen | 2011-08-09 | 1 | -2/+29 |
| * | Implement isLoadFromStackSlotPostFE and isStoreToStackSlotPostFE for ARM. | Jakob Stoklund Olesen | 2011-08-08 | 1 | -0/+12 |
| * | Split up the ARM so_reg ComplexPattern into so_reg_reg and so_reg_imm, allowi... | Owen Anderson | 2011-07-21 | 1 | -1/+1 |
| * | Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A... | Evan Cheng | 2011-07-20 | 1 | -1/+2 |
| * | Remove VMOVDneon and VMOVQ, which are just aliases for VORR. This continues ... | Owen Anderson | 2011-07-15 | 1 | -1/+3 |
| * | Next round of MC refactoring. This patch factor MC table instantiations, MC | Evan Cheng | 2011-07-14 | 1 | -1/+0 |
| * | Add a target-indepedent entry to MCInstrDesc to describe the encoded size of ... | Owen Anderson | 2011-07-13 | 1 | -17/+3 |
| * | Use BranchProbability instead of floating points in IfConverter. | Jakub Staszak | 2011-07-10 | 1 | -15/+23 |
| * | Hide the call to InitMCInstrInfo into tblgen generated ctor. | Evan Cheng | 2011-07-01 | 1 | -2/+2 |
| * | Refactor away tSpill and tRestore pseudos in ARM backend. | Jim Grosbach | 2011-06-29 | 1 | -2/+2 |
| * | Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. | Evan Cheng | 2011-06-28 | 1 | -1/+2 |
| * | Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc | Evan Cheng | 2011-06-28 | 1 | -1/+4 |
| * | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng | 2011-06-28 | 1 | -56/+56 |
| * | use the MachineInstrBuilder operator-> to simplify some code. | Chris Lattner | 2011-04-29 | 1 | -1/+1 |
| * | Change A9 scheduling itineraries VLD* / VST* entries default to "aligned". That | Evan Cheng | 2011-04-19 | 1 | -0/+202 |
| * | Add ORR and EOR to the CMP peephole optimizer. It's hard to get isel to generate | Cameron Zwarich | 2011-04-15 | 1 | -1/+9 |
| * | The AND instruction leaves the V flag unmodified, so it falls victim to the same | Cameron Zwarich | 2011-04-15 | 1 | -7/+6 |
| * | Add missing register forms of instructions to the ARM CMP-folding code. This | Cameron Zwarich | 2011-04-15 | 1 | -0/+12 |
| * | Fix a ton of comment typos found by codespell. Patch by | Chris Lattner | 2011-04-15 | 1 | -1/+1 |
| * | Fix a typo. | Cameron Zwarich | 2011-04-13 | 1 | -4/+4 |
| * | Teach the ARM peephole optimizer that RSB, RSC, ADC, and SBC can be used for ... | Owen Anderson | 2011-04-06 | 1 | -1/+8 |
| * | Get rid of the non-writeback versions VLDMDB and VSTMDB, which don't actually... | Owen Anderson | 2011-03-29 | 1 | -14/+0 |
| * | Nasty bug in ARMBaseInstrInfo::produceSameValue(). The MachineConstantPoolEntry | Evan Cheng | 2011-03-24 | 1 | -5/+12 |
| * | Cmp peephole optimization isn't always safe for signed arithmetics. | Evan Cheng | 2011-03-23 | 1 | -3/+43 |
| * | Preliminary support for ARM frame save directives emission via MI flags. | Anton Korobeynikov | 2011-03-05 | 1 | -2/+3 |
| * | Last round of fixes for movw + movt global address codegen. | Evan Cheng | 2011-01-21 | 1 | -8/+14 |
| * | Convert -enable-sched-cycles and -enable-sched-hazard to -disable | Andrew Trick | 2011-01-21 | 1 | -9/+5 |
| * | Don't be overly aggressive with CSE of "ldr constantpool". If it's a pc-relative | Evan Cheng | 2011-01-20 | 1 | -5/+1 |
| * | Sorry, several patches in one. | Evan Cheng | 2011-01-20 | 1 | -4/+46 |
| * | Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g. | Evan Cheng | 2011-01-17 | 1 | -1/+7 |
| * | Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. | Jakob Stoklund Olesen | 2011-01-10 | 1 | -2/+1 |
| * | Recognize inline asm 'rev /bin/bash, ' as a bswap intrinsic call. | Evan Cheng | 2011-01-08 | 1 | -1/+0 |
| * | Various bits of framework needed for precise machine-level selection | Andrew Trick | 2010-12-24 | 1 | -3/+23 |
