summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/AMDGPU/VIInstrFormats.td
Commit message (Expand)AuthorAgeFilesLines
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [AMDGPU] Refactor VOP1 and VOP2 instruction TD definitionsValery Pykhtin2016-09-231-157/+0
* [AMDGPU] Refactor VOPC instruction TD definitionsValery Pykhtin2016-09-191-21/+0
* [AMDGPU] Refactor MUBUF/MTBUF instructionsValery Pykhtin2016-09-101-58/+0
* [AMDGPU] Assembler: match e32 VOP instructions before e64.Sam Kolton2016-09-091-0/+2
* [AMDGPU] Scalar Memory instructions TD refactoringValery Pykhtin2016-09-011-23/+0
* [AMDGPU] refactor DS instruction definitions. NFC.Valery Pykhtin2016-08-011-20/+0
* [AMDGPU] Assembler: support SDWA for VOPC instructionsSam Kolton2016-07-011-0/+4
* [AMDGPU] Assembler: More tests for SDWA instructions. Fix for SDWA float modi...Sam Kolton2016-06-031-4/+8
* [TableGen] AsmMatcher: support for default values for optional operandsSam Kolton2016-05-061-1/+1
* [AMDGPU] Assembler: basic support for SDWA instructionsSam Kolton2016-04-261-0/+55
* [AMDGPU] Fix SMEM instructions encoding/operand namingsValery Pykhtin2016-03-101-3/+11
* [AMDGPU] Assembler: Support DPP instructions.Sam Kolton2016-03-091-2/+5
* [AMDGPU] Rename $dst operand to $vdst for VOP instructions.Tom Stellard2016-02-161-7/+19
* AMDGPU/SI: Add instruction defs for VOP1 DPP instructionsTom Stellard2016-02-131-0/+45
* R600 -> AMDGPU renameTom Stellard2015-06-131-0/+166
OpenPOWER on IntegriCloud