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path: root/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
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* DAG: Don't try to cluster loads with tied inputsMatt Arsenault2019-03-081-45/+0
* [AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of instruc...Dmitry Preobrazhensky2019-02-271-2/+2
* [AMDGPU] Fixed hang during DAG combineStanislav Mekhanoshin2019-02-261-1/+2
* AMDGPU: Remove debugger related subtarget featuresMatt Arsenault2019-02-211-32/+0
* [AMDGPU] fix commuted case of sub combineStanislav Mekhanoshin2019-02-211-5/+1
* [AMDGPU] Ressociate 'add (add x, y), z' to use SALUStanislav Mekhanoshin2019-02-141-0/+43
* [AMDGPU] Split dot-insts featureStanislav Mekhanoshin2019-02-091-1/+1
* Implementation of asm-goto support in LLVMCraig Topper2019-02-081-1/+2
* AMDGPU/GlobalISel: Legalize addrspacecastMatt Arsenault2019-02-081-1/+2
* [AMDGPU] Consider XOR in waterfall loop as a terminatorScott Linder2019-02-051-1/+1
* [AMDGPU] Support emitting GOT relocations for function callsScott Linder2019-02-041-23/+13
* [AMDGPU] Fix for vector element insertionTim Corringham2019-02-011-5/+5
* AMDGPU: Add DS append/consume intrinsicsMatt Arsenault2019-01-281-1/+15
* [AMDGPU] Add intrinsics for 16 bit interpolationTim Corringham2019-01-281-0/+53
* Codegen support for atomicrmw fadd/fsubMatt Arsenault2019-01-221-6/+42
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* AMDGPU: Remove llvm.SI.load.constMatt Arsenault2019-01-181-7/+0
* AMDGPU: Adjust the chain for loads writing to the HI part of a register.Changpeng Fang2019-01-161-0/+45
* AMDGPU: Add llvm.amdgcn.ds.ordered.add & swapMarek Olsak2019-01-161-0/+61
* AMDGPU: Add a fast path for icmp.i1(src, false, NE)Marek Olsak2019-01-151-0/+5
* [AMDGPU] Add support for TFE/LWE in image intrinsics. 2nd tryDavid Stuttard2019-01-141-53/+289
* [AMDGPU] Separate feature dot-instsStanislav Mekhanoshin2019-01-101-1/+1
* Remove check for single use in ShrinkDemandedConstantStanislav Mekhanoshin2019-01-091-2/+1
* [AMDGPU] Handle OR as operand of raw load/storePiotr Sobczak2019-01-021-4/+6
* Fix unused variable warning. NFCI.Simon Pilgrim2018-12-071-2/+2
* AMDGPU: Allow f32 types for llvm.amdgcn.s.buffer.loadMatt Arsenault2018-12-071-5/+6
* AMDGPU: Remove llvm.SI.tbuffer.storeMatt Arsenault2018-12-071-49/+0
* AMDGPU: Remove llvm.AMDGPU.killMatt Arsenault2018-12-071-15/+2
* AMDGPU: Divergence-driven selection of scalar buffer load intrinsicsNicolai Haehnle2018-11-301-33/+74
* AMDGPU: Fix various issues around the VirtReg2Value mappingNicolai Haehnle2018-11-301-29/+36
* Revert r347871 "Fix: Add support for TFE/LWE in image intrinsic"David Stuttard2018-11-291-289/+53
* Fix: Add support for TFE/LWE in image intrinsicDavid Stuttard2018-11-291-2/+1
* Add support for TFE/LWE in image intrinsicsDavid Stuttard2018-11-291-53/+290
* [AMDGPU] Disable DAG combine at -O0Stanislav Mekhanoshin2018-11-271-6/+5
* [AMDGPU] Fix -Wunused-variableFangrui Song2018-11-191-1/+0
* [AMDGPU] Convert insert_vector_elt into set of selectsStanislav Mekhanoshin2018-11-191-0/+40
* [AMDGPU] combine extractelement into several selectsStanislav Mekhanoshin2018-11-131-4/+26
* Revert "AMDGPU: Divergence-driven selection of scalar buffer load intrinsics"Nicolai Haehnle2018-11-071-74/+33
* [TargetLowering] Change TargetLoweringBase::getPreferredVectorAction to take ...Craig Topper2018-11-051-1/+1
* Fixed inclusion of M_PI fow MinGW-w64Sylvestre Ledru2018-11-021-1/+1
* [AMDGPU] UBSan bug fix for r345710Neil Henning2018-11-021-1/+1
* Fix clang -Wimplicit-fallthrough warnings across llvm, NFCReid Kleckner2018-11-011-2/+1
* [AMDGPU] support image load/store a16Neil Henning2018-10-311-2/+4
* AMDGPU: Remove custom BUILD_VECTOR combineMatt Arsenault2018-10-301-45/+0
* DAG: Change behavior of fminnum/fmaxnum nodesMatt Arsenault2018-10-221-33/+133
* AMDGPU: Avoid selecting ds_{read,write}2_b32 on SINicolai Haehnle2018-10-171-0/+23
* AMDGPU: Divergence-driven selection of scalar buffer load intrinsicsNicolai Haehnle2018-10-171-33/+74
* AMDGPU: Rename isAmdCodeObjectV2 -> isAmdHsaOrMesaKonstantin Zhuravlyov2018-10-041-3/+3
* [AMDGPU] Fix for negative offsets in buffer/tbuffer intrinsicsTim Renouf2018-10-031-1/+8
* AMDGPU: Fix private handling for allowsMisalignedMemoryAccessesMatt Arsenault2018-09-241-1/+5
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