bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Expand)	Author	Age	Files	Lines
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*	[AMDGPU][MC][GFX8] Added BUFFER_STORE_LDS_DWORD Instruction	Dmitry Preobrazhensky	2018-03-12	1	-0/+24
*	[AMDGPU][MC] Added lds support for MUBUF instructions	Dmitry Preobrazhensky	2018-02-21	1	-53/+129
*	AMDGPU/SI: Adjust the encoding family for D16 buffer instructions when the ta...	Changpeng Fang	2018-02-01	1	-4/+4
*	AMDGPU/SI: Fix typos in d16 support patch the buffer intrinsics.	Changpeng Fang	2018-01-18	1	-4/+4
*	AMDGPU/SI: Add d16 support for buffer intrinsics.	Changpeng Fang	2018-01-12	1	-8/+238
*	AMDGPU: Select d16 loads into low component of register	Matt Arsenault	2017-11-13	1	-3/+37
*	AMDGPU: Lower buffer store and atomic intrinsics manually	Marek Olsak	2017-11-09	1	-20/+20
*	AMDGPU: Select s_buffer_load_dword with a non-constant SGPR offset	Marek Olsak	2017-10-31	1	-7/+0
*	AMDGPU: Remove global isGCN predicates	Matt Arsenault	2017-10-03	1	-60/+52
*	AMDGPU: Match load d16 hi instructions	Matt Arsenault	2017-09-20	1	-14/+53
*	AMDGPU: Cleanup load/store PatFrags	Matt Arsenault	2017-09-20	1	-12/+12
*	AMDGPU: Match store d16_hi instructions	Matt Arsenault	2017-09-20	1	-0/+10
*	AMDGPU: Don't legalize i16 extloads to i32 with legal i16	Matt Arsenault	2017-09-07	1	-0/+3
*	AMDGPU: Add most d16 load/store instruction definitions	Matt Arsenault	2017-09-01	1	-0/+45
*	AMDGPU: Implement memory model	Konstantin Zhuravlyov	2017-07-21	1	-4/+4
*	AMDGPU: Introduce maybeAtomic instruction flag	Konstantin Zhuravlyov	2017-07-21	1	-0/+3
*	AMDGPU: Rename _RTN atomic instructions	Matt Arsenault	2017-07-20	1	-22/+22
*	[AMDGPU] Add intrinsics for tbuffer load and store	David Stuttard	2017-06-22	1	-78/+333
*	AMDGPU: Change mubuf soffset register when SP relative	Matt Arsenault	2017-05-17	1	-2/+2
*	AMDGPU: Select scratch mubuf offsets when pointer is a constant	Matt Arsenault	2017-04-24	1	-27/+48
*	AMDGPU: Remove llvm.SI.vs.load.input	Matt Arsenault	2017-04-03	1	-6/+0
*	[AMDGPU] Get address space mapping by target triple environment	Yaxun Liu	2017-03-27	1	-2/+2
*	AMDGPU/SI: Add a MachineMemOperand when lowering llvm.amdgcn.buffer.load.*	Tom Stellard	2016-12-20	1	-6/+6
*	AMDGPU: Add VI i16 support	Tom Stellard	2016-11-10	1	-7/+44
*	Revert "AMDGPU: Add VI i16 support"	Tom Stellard	2016-11-04	1	-44/+7
*	AMDGPU: Add VI i16 support	Tom Stellard	2016-11-03	1	-7/+44
*	AMDGPU: Whitespace fixes	Matt Arsenault	2016-11-01	1	-5/+3
*	AMDGPU: Rename glc operand type	Matt Arsenault	2016-10-28	1	-4/+4
*	AMDGPU/SI: Handle hazard with > 8 byte VMEM stores	Tom Stellard	2016-10-27	1	-0/+1
*	[AMDGPU][mc] Add support for buffer_load_dwordx3, buffer_store_dwordx3.	Artem Tamazov	2016-10-07	1	-0/+10
*	Target: Remove unused patterns and transforms. NFC.	Peter Collingbourne	2016-10-07	1	-6/+0
*	AMDGPU: Partially fix reported code size for some instructions	Matt Arsenault	2016-10-06	1	-1/+2
*	[AMDGPU] Fix for bz30427: wrong MTBUF encoding on VI	Valery Pykhtin	2016-09-23	1	-6/+10
*	[AMDGPU] Refactor MUBUF/MTBUF instructions	Valery Pykhtin	2016-09-10	1	-0/+1305