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path: root/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
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* AMDGPU: Add instruction definitions for VGPR indexingMatt Arsenault2016-10-121-0/+5
* [AMDGPU] Refactor waitcnt encodingKonstantin Zhuravlyov2016-10-111-24/+12
* Revert r283690, "MC: Remove unused entities."Peter Collingbourne2016-10-101-1/+1
* Move the global variables representing each Target behind accessor functionMehdi Amini2016-10-091-2/+2
* MC: Remove unused entities.Peter Collingbourne2016-10-091-1/+1
* [AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx t...Sam Kolton2016-10-071-36/+90
* [AMDGPU] Choose VMCNT, EXPCNT, LGKMCNT masks and shifts based on the isa versionKonstantin Zhuravlyov2016-09-301-6/+8
* [AMDGPU][mc] Add support for absolute expressions in DPP modifiers.Artem Tamazov2016-09-221-35/+22
* AMDGPU] Assembler: better support for immediate literals in assembler.Sam Kolton2016-09-091-142/+365
* [AMDGPU] Assembler: match e32 VOP instructions before e64.Sam Kolton2016-09-091-23/+64
* AMDGPU: Remove excessive padding from ImmOp and RegOp.Matt Arsenault2016-08-161-4/+4
* [AMDGPU] Assembler: fix row_bcast parsingSam Kolton2016-07-141-0/+2
* [AMDGPU][llvm-mc] Quickfix for r272748 to enable labels in branch instructions.Artem Tamazov2016-07-111-0/+2
* [AMDGPU] Assembler: Fix parsing error with floating-point literals passed to ...Sam Kolton2016-07-051-6/+1
* [AMDGPU] Assembler: support SDWA for VOPC instructionsSam Kolton2016-07-011-7/+30
* [AMDGPU] Enable absolute expression initializer for amd_kernel_code_t fields.Valery Pykhtin2016-06-231-4/+1
* Delete more dead code.Rafael Espindola2016-06-211-46/+0
* Delete some dead code.Rafael Espindola2016-06-211-5/+0
* AMDGPU/AsmParser: Add support for parsing symbol operandsTom Stellard2016-06-151-2/+46
* [AMDGPU][llvm-mc] Predefined symbols to access -mcpu from the assembly source...Artem Tamazov2016-06-141-2/+15
* [AMDGPU] AsmParser: Support for sext() modifier in SDWA. Some code cleaning i...Sam Kolton2016-06-101-187/+245
* AMDGPU: Fix trailing whitespaceMatt Arsenault2016-06-101-17/+17
* [test/AMDGPU] Square-braced-syntax for registers: add macro test/example.Artem Tamazov2016-06-031-19/+45
* [AMDGPU] Assembler: Custom converters for SDWA instructions. Support for _dpp...Sam Kolton2016-06-031-54/+154
* [AMDGPU][llvm-mc] Square-braced-syntax for registers - make ":expr2" optional.Artem Tamazov2016-05-271-6/+10
* [AMDGPU][llvm-mc] s_getreg/setreg* - hwreg - factor out strings/literals etc.Artem Tamazov2016-05-261-86/+38
* [AMDGPU] Assembler: rework parsing of optional operands.Sam Kolton2016-05-241-280/+84
* [AMDGPU] Assembler: refactor parsing of modifiers and immediates. Allow modif...Sam Kolton2016-05-231-175/+244
* [AMDGPU][llvm-mc] Fixes to support buffer atomics.Artem Tamazov2016-05-191-5/+81
* [AMDGPU][llvm-mc] Add support for sendmsg(...) syntax.Artem Tamazov2016-05-061-0/+239
* [TableGen] AsmMatcher: support for default values for optional operandsSam Kolton2016-05-061-100/+111
* AMDGPU/SI: Add support for AMD code object version 2.Tom Stellard2016-05-051-1/+1
* Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rewor...Artem Tamazov2016-04-291-1/+2
* AMDGPU/SI: Assembler: Unify parsing/printing of operands.Nikolay Haustov2016-04-291-238/+224
* Revert "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for ...Chad Rosier2016-04-271-2/+1
* Silence a -Wdangling-elseReid Kleckner2016-04-271-1/+2
* [AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD.Artem Tamazov2016-04-271-1/+2
* [AMDGPU][llvm-mc] s_getreg/setreg* - Support symbolic names of hardware regis...Artem Tamazov2016-04-271-9/+28
* [AMDGPU] Assembler: basic support for SDWA instructionsSam Kolton2016-04-261-0/+112
* [AMDGPU][llvm-mc] s_getreg/setreg* - Add hwreg(...) syntax.Artem Tamazov2016-04-251-0/+94
* [AMDGPU] Assembler: prevent parseDPPCtrlOps from eating invalid tokensSam Kolton2016-04-211-2/+14
* AMDGPU/SI: Assembler: improvements to support trap handlers.Nikolay Haustov2016-04-201-69/+123
* [NFC] Header cleanupMehdi Amini2016-04-181-1/+0
* [AMDGPU][llvm-mc] Support of Trap Handler registers (TTMP0..11 and TBA/TMA)gi...Artem Tamazov2016-04-131-21/+34
* [AMDGPU] Assembler: Change dpp_ctrl syntax to match sp3Sam Kolton2016-03-181-46/+88
* [AMDGPU] AsmParser: Factor out parseRegister. NFC.Valery Pykhtin2016-03-141-24/+40
* [AMDGPU] AsmParser: refactor post push_back vector access. NFC.Valery Pykhtin2016-03-141-6/+5
* [AMDGPU] AsmParser: remove redundant isReg checks. NFC.Valery Pykhtin2016-03-141-7/+7
* [AMDGPU] Assembler: Support DPP instructions.Sam Kolton2016-03-091-5/+175
* [AMDGPU] Assembler: Support abs() syntax.Nikolay Haustov2016-03-091-2/+19
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