diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-10-12 18:00:51 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-10-12 18:00:51 +0000 |
| commit | cc88ce36ed6dd8f87b3045da30d224adc64815cc (patch) | |
| tree | e23347e65257a1bba607d421f7181870d32709e3 /llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | |
| parent | 0fd6e9608e3730f2d99255786af22e46d975af9b (diff) | |
| download | bcm5719-llvm-cc88ce36ed6dd8f87b3045da30d224adc64815cc.tar.gz bcm5719-llvm-cc88ce36ed6dd8f87b3045da30d224adc64815cc.zip | |
AMDGPU: Add instruction definitions for VGPR indexing
VI added a second method of indexing into VGPRs
besides using v_movrel*
llvm-svn: 284027
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp index 6d8a7a5d4f6..957233caa9f 100644 --- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -344,6 +344,7 @@ public: bool isSMRDOffset() const; bool isSMRDLiteralOffset() const; bool isDPPCtrl() const; + bool isGPRIdxMode() const; StringRef getExpressionAsToken() const { assert(isExpr()); @@ -2744,6 +2745,10 @@ bool AMDGPUOperand::isDPPCtrl() const { return false; } +bool AMDGPUOperand::isGPRIdxMode() const { + return isImm() && isUInt<4>(getImm()); +} + AMDGPUAsmParser::OperandMatchResultTy AMDGPUAsmParser::parseDPPCtrl(OperandVector &Operands) { SMLoc S = Parser.getTok().getLoc(); |
