diff options
| author | Artem Tamazov <artem.tamazov@amd.com> | 2016-04-27 16:20:23 +0000 |
|---|---|---|
| committer | Artem Tamazov <artem.tamazov@amd.com> | 2016-04-27 16:20:23 +0000 |
| commit | 3896f8f83d236c543945b0bcee0d341dbfb6c2ab (patch) | |
| tree | d3561e7091aa9d7c6ad0910abbc9b32d10ee181c /llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | |
| parent | 0336cc05e718cd394cfd22ab519f9a9a4c998b08 (diff) | |
| download | bcm5719-llvm-3896f8f83d236c543945b0bcee0d341dbfb6c2ab.tar.gz bcm5719-llvm-3896f8f83d236c543945b0bcee0d341dbfb6c2ab.zip | |
[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD.
Added support of TTMP quads.
Reworked M0 exclusion machinery for SMRD and similar instructions
to enable usage of TTMP registers in those instructions as destinations.
Tests added.
Differential Revision: http://reviews.llvm.org/D19342
llvm-svn: 267733
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp index af85e64db20..72b0c5afc72 100644 --- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -611,13 +611,14 @@ static int getRegClass(RegisterKind Is, unsigned RegWidth) { default: return -1; case 1: return AMDGPU::TTMP_32RegClassID; case 2: return AMDGPU::TTMP_64RegClassID; + case 4: return AMDGPU::TTMP_128RegClassID; } } else if (Is == IS_SGPR) { switch (RegWidth) { default: return -1; case 1: return AMDGPU::SGPR_32RegClassID; case 2: return AMDGPU::SGPR_64RegClassID; - case 4: return AMDGPU::SReg_128RegClassID; + case 4: return AMDGPU::SGPR_128RegClassID; case 8: return AMDGPU::SReg_256RegClassID; case 16: return AMDGPU::SReg_512RegClassID; } |
