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path: root/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
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* [PM] Port the always inliner to the new pass manager in a much moreChandler Carruth2016-08-171-1/+2
* [AMDGPU] Remove duplicate initialization of SIDebuggerInsertNops passKonstantin Zhuravlyov2016-08-161-1/+0
* AMDGPU: Prune includesMatt Arsenault2016-08-111-9/+5
* [GlobalISel] Introduce an instruction selector.Ahmed Bougacha2016-07-271-0/+5
* GlobalISel: implement legalization pass, with just one transformation.Tim Northover2016-07-221-0/+5
* AMDGPU: Change fdiv lowering based on !fpmath metadataMatt Arsenault2016-07-191-0/+8
* AMDGPU/R600: Delete/rename intrinsics no longer used by mesaMatt Arsenault2016-07-141-1/+0
* AMDGPU/SI: Add support for R_AMDGPU_GOTPCRELTom Stellard2016-07-131-3/+3
* AMDGPU: Add option to run the load/store vectorizerMatt Arsenault2016-07-011-0/+16
* AMDGPU: Fix global isel crashesMatt Arsenault2016-06-281-4/+7
* AMDGPU: Fix typoMatt Arsenault2016-06-281-7/+6
* AMDGPU: Fix global isel buildMatt Arsenault2016-06-281-0/+12
* AMDGPU: Implement per-function subtargetsMatt Arsenault2016-06-271-6/+64
* AMDGPU: Move subtarget feature checks into passesMatt Arsenault2016-06-271-14/+30
* AMDGPU: Add stub custom CodeGenPrepare passMatt Arsenault2016-06-241-0/+1
* AMDGPU: Remove disable-irstructurizer subtarget featureMatt Arsenault2016-06-241-2/+7
* AMDGPU: Cleanup subtarget handling.Matt Arsenault2016-06-241-20/+28
* AMDGPU: Run verifier after 2nd run of SIShrinkInstructionsMatt Arsenault2016-06-221-1/+1
* AMDGPU: Fix verifier errors in SILowerControlFlowMatt Arsenault2016-06-221-2/+2
* AMDGPU: Run pointer optimization passesMatt Arsenault2016-06-151-7/+46
* AMDGPU: Run verifer after insert waits passMatt Arsenault2016-06-091-1/+1
* AMDGPU: Properly initialize SIShrinkInstructionsMatt Arsenault2016-06-091-0/+1
* AMDGPU: Fix crashes on unknown processor nameMatt Arsenault2016-06-021-1/+1
* AMDGPU: SIDebuggerInsertNops preserves CFGMatt Arsenault2016-06-021-0/+1
* AMDGPU: Remove unused address spaceMatt Arsenault2016-05-311-10/+10
* Delete Reloc::Default.Rafael Espindola2016-05-181-8/+15
* AMDGPU: Don't run passes that aren't usefulMatt Arsenault2016-05-181-0/+5
* [AMDGPU][NFC] Rename SIInsertNops -> SIDebuggerInsertNopsKonstantin Zhuravlyov2016-05-101-2/+2
* CodeGen: Move TargetPassConfig from Passes.h to an own header; NFCMatthias Braun2016-05-101-1/+2
* AMDGPU/SI: Add support for AMD code object version 2.Tom Stellard2016-05-051-3/+0
* AMDGPU/SI: Enable the post-ra schedulerTom Stellard2016-04-301-0/+11
* AMDGPU/SI: Move post regalloc run of SIShrinkInstructionsMatt Arsenault2016-04-291-5/+1
* [AMDGPU] Insert nop pass: take care of outstanding feedbackKonstantin Zhuravlyov2016-04-221-5/+1
* [AMDGPU] Add insert nops pass based on subtarget features instead of cl::optKonstantin Zhuravlyov2016-04-181-7/+3
* AMDGPU: Run SIFoldOperands after PeepholeOptimizerMatt Arsenault2016-04-141-1/+15
* AMDGPU: Add skeleton GlobalIsel implementationTom Stellard2016-04-141-0/+16
* AMDGPU: Remove SIFixSGPRLiveRanges passNicolai Haehnle2016-04-141-7/+0
* AMDGPU: Add SIWholeQuadMode passNicolai Haehnle2016-03-211-0/+2
* AMDGPU: R600 code splitting cleanupMatt Arsenault2016-03-111-2/+2
* AMDGPU: Insert two S_NOP instructions for every high level source statement.Tom Stellard2016-03-031-0/+11
* AMDGPU/SI: Detect uniform branches and emit s_cbranch instructionsTom Stellard2016-02-121-5/+5
* AMDGPU: Initialize SILowerControlFlowMatt Arsenault2016-02-121-1/+2
* AMDGPU: Fix ordering of CPU and FS parameters in TargetMachine constructorsTom Stellard2016-02-051-4/+4
* AMDGPU/SI: Correctly initialize SIInsertWaits passTom Stellard2016-02-051-1/+2
* AMDGPU: Skip promote alloca with no optimizationsMatt Arsenault2016-02-021-1/+1
* AMDGPU: Fix emitting invalid workitem intrinsics for HSAMatt Arsenault2016-01-301-2/+4
* AMDGPU: Fix default device handlingMatt Arsenault2016-01-271-2/+16
* AMDGPU/SI: Pass whether to use the SI scheduler via Target AttributeTom Stellard2016-01-211-0/+2
* Correctly initialize SIAnnotateControlFlowTom Stellard2016-01-201-0/+1
* AMDGPU/SI: Add SI Machine SchedulerNicolai Haehnle2016-01-131-2/+6
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