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path: root/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
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* AMDGPU: Remove remnants of old address space mappingMatt Arsenault2018-08-311-6/+0
* [AMDGPU] Add support for multi-dword s.buffer.load intrinsicTim Renouf2018-08-251-0/+1
* AMDGPU: Fix not respecting byval alignment in call frame setupMatt Arsenault2018-08-221-1/+0
* AMDGPU: Custom lower fexpMatt Arsenault2018-08-161-1/+2
* AMDGPU: Address todo for handling 1/(2 pi)Matt Arsenault2018-08-151-0/+2
* DAG: Enhance isKnownNeverNaNMatt Arsenault2018-08-031-0/+5
* Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"Matt Arsenault2018-07-201-2/+5
* [AMDGPU] [AMDGPU] Support a fdot2 pattern.Farhana Aleen2018-07-161-0/+1
* Revert "AMDGPU: Fix handling of alignment padding in DAG argument lowering"Evgeniy Stepanov2018-07-141-5/+2
* AMDGPU: Fix handling of alignment padding in DAG argument loweringMatt Arsenault2018-07-131-2/+5
* AMDGPU: Refactor Subtarget classesTom Stellard2018-07-111-3/+3
* AMDGPU: Separate R600 and GCN TableGen filesTom Stellard2018-06-281-3/+4
* AMDGPU: Remove MFI::ABIArgOffsetMatt Arsenault2018-06-281-1/+1
* [AMDGPU] Convert rcp to rcp_iflagStanislav Mekhanoshin2018-06-271-0/+2
* AMDGPU: Remove old-style image intrinsicsNicolai Haehnle2018-06-211-84/+0
* AMDGPU: Move isSDNodeSourceOfDivergence() implementation to SITargetLoweringTom Stellard2018-06-131-2/+0
* [AMDGPU] DAG combine to produce V_PERM_B32Stanislav Mekhanoshin2018-06-121-0/+1
* AMDGPU/R600: Remove code for handling AMDGPUISD::CLAMPTom Stellard2018-05-241-1/+0
* AMDGPU: Move AMDGPUTargetLowering::isFPExtFoldable() into SITargetLoweringTom Stellard2018-05-221-1/+0
* AMDGPU: Custom lower v4i16/v4f16 vector operationsMatt Arsenault2018-05-161-0/+4
* AMDGPU: Add combine for trunc of bitcast from build_vectorMatt Arsenault2018-05-091-0/+1
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-7/+7
* AMDGPU: Fix build warning about overrideMatt Arsenault2018-03-051-3/+3
* Pass Divergence Analysis data to Selection DAG to drive divergenceAlexander Timofeev2018-03-051-0/+3
* AMDGPU: Add intrinsics llvm.amdgcn.cvt.{pknorm.i16, pknorm.u16, pk.i16, pk.u16}Marek Olsak2018-01-311-0/+4
* AMDGPU/SI: Add d16 support for image intrinsics.Changpeng Fang2018-01-181-0/+85
* [AMDGPU] add LDS f32 intrinsicsDaniil Fukalov2018-01-171-0/+3
* AMDGPU/SI: Add d16 support for buffer intrinsics.Changpeng Fang2018-01-121-0/+4
* [AMDGPU] Turn off MergeConsecutiveStores() before Instruction Selection for A...Mark Searles2017-12-191-0/+10
* [AMDGPU] Add custom lowering for llvm.log{,10}.{f16,f32} intrinsicsVedran Miletic2017-11-271-0/+2
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-1/+1
* AMDGPU: Lower buffer store and atomic intrinsics manuallyMarek Olsak2017-11-091-0/+13
* AMDGPU: Remove redundant combineMatt Arsenault2017-11-071-1/+0
* AMDGPU: Select v_mad_u64_u32 and v_mad_i64_i32Matt Arsenault2017-11-061-0/+4
* AMDGPU: Implement isFPExtFoldableMatt Arsenault2017-10-131-0/+1
* Implement custom lowering for ISD::CTTZ_ZERO_UNDEF and ISD::CTTZ.Wei Ding2017-10-121-3/+4
* AMDGPU: Start adding tail call supportMatt Arsenault2017-08-111-0/+6
* AMDGPU: Don't use report_fatal_error for unsupported call typesMatt Arsenault2017-08-031-0/+4
* AMDGPU: Pass special input registers to functionsMatt Arsenault2017-08-031-1/+20
* AMDGPU: Return correct type during argument loweringMatt Arsenault2017-07-151-0/+1
* [AMDGPU] Add intrinsics for tbuffer load and storeDavid Stuttard2017-06-221-0/+2
* AMDGPU: Cleanup CreateLiveInRegisterMatt Arsenault2017-06-191-4/+19
* [AMDGPU] Convert shl (add) into add (shl)Stanislav Mekhanoshin2017-05-231-0/+3
* AMDGPU: Start defining a calling conventionMatt Arsenault2017-05-171-3/+2
* AMDGPU: Pull fneg out of extract_vector_eltMatt Arsenault2017-05-111-0/+2
* Generalize the specialized flag-carrying SDNodes by moving flags into SDNode.Amara Emerson2017-05-011-2/+3
* AMDGPU: Add new amdgcn.init.exec intrinsicsMarek Olsak2017-04-281-0/+2
* [SelectionDAG] Use KnownBits struct in DAG's computeKnownBits and simplifyDem...Craig Topper2017-04-281-2/+1
* CodeGen: Add a hook for getFenceOperandTyYaxun Liu2017-04-241-0/+4
* AMDGPU: Move trap lowering to DAGMatt Arsenault2017-04-241-0/+1
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