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path: root/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
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* [IR] Split out target specific intrinsic enums into separate headersReid Kleckner2019-12-111-0/+1
* Rename TTI::getIntImmCost for instructions and intrinsicsReid Kleckner2019-12-111-4/+4
* [ARM] Teach the Arm cost model that a Shift can be folded into other instruct...David Green2019-12-091-1/+2
* [AArch64TTI] Compute imm materialization cost for AArch64 intrinsicsFlorian Hahn2019-12-041-0/+6
* [Alignment][NFC] getMemoryOpCost uses MaybeAlignGuillaume Chatelet2019-10-251-4/+4
* [System Model] [TTI] Update cache and prefetch TTI interfacesDavid Greene2019-10-091-16/+0
* [AArch64] Expand bcmp() for small block lengthsEvandro Menezes2019-08-051-0/+13
* Revert "[System Model] [TTI] Update cache and prefetch TTI interfaces"David Greene2019-07-101-0/+16
* [System Model] [TTI] Update cache and prefetch TTI interfacesDavid Greene2019-07-101-16/+0
* [NFC] Test commit, delete trailing whitespaceGraham Hunter2019-05-281-1/+1
* [AArch64] Small fix for getIntImmCostAdhemerval Zanella2019-03-181-2/+4
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [LV] Support vectorization of interleave-groups that require an epilog underDorit Nuzman2018-10-311-3/+6
* [TTI] Add generic SK_Broadcast shuffle costsSimon Pilgrim2018-10-251-2/+13
* recommit 344472 after fixing build failure on ARM and PPC.Dorit Nuzman2018-10-141-3/+4
* revert 344472 due to failures.Dorit Nuzman2018-10-141-4/+3
* [IAI,LV] Add support for vectorizing predicated strided accesses using maskedDorit Nuzman2018-10-141-3/+4
* Remove trailing spaceFangrui Song2018-07-301-1/+1
* [AArch64] Add custom lowering for v4i8 trunc storeAdhemerval Zanella2018-06-271-8/+16
* [CostModel][AArch64] Add some initial costs for SK_Select and SK_PermuteSingl...Simon Pilgrim2018-06-221-17/+32
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-4/+4
* [AArch64] Improve cost of vector division by constantAdhemerval Zanella2018-05-091-0/+22
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-2/+2
* [TTI, AArch64] Add transpose shuffle kindMatthew Simpson2018-04-261-0/+27
* [AArch64] Implement getArithmeticReductionCostMatthew Simpson2018-03-161-0/+28
* [AArch64] Adjust the cost of integer vector divisionEvandro Menezes2018-03-071-22/+38
* Fix -Wsign-compare warnings on WindowsReid Kleckner2018-01-051-1/+1
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-2/+2
* Sink some IntrinsicInst.h and Intrinsics.h out of llvm/includeReid Kleckner2017-09-071-0/+1
* [AArch64][Falkor] Attempt to fix Windows buildbotsGeoff Berry2017-06-281-1/+1
* [AArch64][Falkor] Try to avoid exhausting HW prefetcher resources when unroll...Geoff Berry2017-06-281-0/+59
* [LoopUnroll] Pass SCEV to getUnrollingPreferences hook. NFCI.Geoff Berry2017-06-281-2/+2
* [AArch64] Inline callee if its target-features are a subset of the callerFlorian Hahn2017-06-271-0/+14
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
* Re-commit r302678, fixing PR33053.Amara Emerson2017-05-161-0/+25
* Revert r302678 "[AArch64] Enable use of reduction intrinsics."Hans Wennborg2017-05-151-23/+0
* [AArch64] Enable use of reduction intrinsics.Amara Emerson2017-05-101-0/+23
* [AArch64] Consider widening instructions in cost calculationsMatthew Simpson2017-05-091-6/+100
* [SystemZ] TargetTransformInfo cost functions implemented.Jonas Paulsson2017-04-121-4/+6
* [ARM/AArch64] Ensure valid vector element types for interleaved accessesMatthew Simpson2017-04-101-4/+4
* [CodeGenPrep] move aarch64-type-promotion to CGPJun Bum Lim2017-04-031-0/+32
* TTI: Split IsSimple in MemIntrinsicInfoMatt Arsenault2017-03-241-4/+0
* [ARM/AArch64] Update costs for interleaved accesses with wide typesMatthew Simpson2017-03-021-2/+4
* [X86] updating TTI costs for arithmetic instructions on X86\SLM arch.Mohammed Agabaria2017-01-111-1/+1
* [AArch64] Consider all vector types for FeatureSlowMisaligned128StoreEvandro Menezes2017-01-101-12/+11
* Currently isLikelyComplexAddressComputation tries to figure out if the given ...Mohammed Agabaria2017-01-051-2/+5
* [AArch64] Guard Misaligned 128-bit store penalty by subtarget featureMatthew Simpson2016-12-151-1/+2
* AArch64: Do not test for CPUs, use SubtargetFeaturesMatthias Braun2016-06-021-21/+6
* Add parentheses to silence buildbot warningMatthew Simpson2016-04-271-2/+2
* [TTI] Add hook for vector extract with extensionMatthew Simpson2016-04-271-0/+55
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