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author | Guillaume Chatelet <gchatelet@google.com> | 2019-10-22 17:16:52 +0200 |
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committer | Guillaume Chatelet <gchatelet@google.com> | 2019-10-25 21:26:59 +0200 |
commit | a4783ef58d3dd52b2079e885e9b4467c6b0b3a16 (patch) | |
tree | 933af222146c40ba67e58f05093900f4b6882af8 /llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp | |
parent | 3c7c3717932aba864c23edd2e48f1b28a6d532d5 (diff) | |
download | bcm5719-llvm-a4783ef58d3dd52b2079e885e9b4467c6b0b3a16.tar.gz bcm5719-llvm-a4783ef58d3dd52b2079e885e9b4467c6b0b3a16.zip |
[Alignment][NFC] getMemoryOpCost uses MaybeAlign
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: nemanjai, hiraditya, kbarton, MaskRay, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69307
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp')
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp index dc916a7b340..908d72dbfc3 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp @@ -632,12 +632,12 @@ AArch64TTIImpl::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { } int AArch64TTIImpl::getMemoryOpCost(unsigned Opcode, Type *Ty, - unsigned Alignment, unsigned AddressSpace, + MaybeAlign Alignment, unsigned AddressSpace, const Instruction *I) { auto LT = TLI->getTypeLegalizationCost(DL, Ty); if (ST->isMisaligned128StoreSlow() && Opcode == Instruction::Store && - LT.second.is128BitVector() && Alignment < 16) { + LT.second.is128BitVector() && (!Alignment || *Alignment < Align(16))) { // Unaligned stores are extremely inefficient. We don't split all // unaligned 128-bit stores because the negative impact that has shown in // practice on inlined block copy code. @@ -703,8 +703,8 @@ int AArch64TTIImpl::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) { if (!I->isVectorTy()) continue; if (I->getScalarSizeInBits() * I->getVectorNumElements() == 128) - Cost += getMemoryOpCost(Instruction::Store, I, 128, 0) + - getMemoryOpCost(Instruction::Load, I, 128, 0); + Cost += getMemoryOpCost(Instruction::Store, I, Align(128), 0) + + getMemoryOpCost(Instruction::Load, I, Align(128), 0); } return Cost; } |