summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
Commit message (Expand)AuthorAgeFilesLines
...
* [SimplifyCFG] don't sink common insts too soon (PR34603)Sanjay Patel2017-12-141-1/+1
* [AArch64] Avoid SIMD interleaved store instruction for Exynos.Abderrazek Zaafrani2017-12-081-2/+2
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-1/+1
* [SimplifyCFG] use pass options and remove the latesimplifycfg passSanjay Patel2017-10-281-1/+1
* Revert "TargetMachine: Merge TargetMachine and LLVMTargetMachine"Matthias Braun2017-10-121-3/+4
* TargetMachine: Merge TargetMachine and LLVMTargetMachineMatthias Braun2017-10-121-4/+3
* [AArch64] Use LateSimplifyCFG after expanding atomic operations.Balaram Makam2017-10-031-1/+1
* [GlobalISel] Make GlobalISel a non-optional library.Quentin Colombet2017-08-031-4/+0
* Delete Default and JITDefault code modelsRafael Espindola2017-08-031-14/+38
* [AArch64] Remove outdated comment. NFC.Ahmed Bougacha2017-07-271-2/+0
* [AArch64][Falkor] Avoid HW prefetcher tag collisions (step 2)Geoff Berry2017-07-181-2/+7
* [COFF, ARM64] Correct the data layout string for COFF ARM64 targetMandeep Singh Grang2017-07-171-1/+1
* [AArch64][Falkor] Avoid HW prefetcher tag collisions (step 1)Geoff Berry2017-07-141-2/+10
* [AArch64] Only run macro fusion for CPUs with any fusion support.Florian Hahn2017-07-121-1/+3
* [AArch64] Add AArch64Subtarget::isFusion function.Florian Hahn2017-07-121-1/+1
* [COFF, ARM64] Add support for Windows ARM64 COFF formatMandeep Singh Grang2017-06-271-0/+4
* [AArch64] Prefer Bcc to CBZ/CBNZ/TBZ/TBNZ when NZCV flags can be set for "free".Chad Rosier2017-06-231-0/+7
* TargetPassConfig: Keep a reference to an LLVMTargetMachine; NFCMatthias Braun2017-05-301-3/+3
* [AArch64][GlobalISel] Add the Localizer pass for the O0 pipelineQuentin Colombet2017-05-271-1/+9
* [AArch64] Make instruction fusion more aggressive. Florian Hahn2017-05-231-1/+1
* [globalisel][tablegen] Demote OptForSize/OptForMinSize/ForCodeSize to per-fun...Daniel Sanders2017-05-191-5/+2
* [LegacyPassManager] Remove TargetMachine constructorsFrancis Visoiu Mistrih2017-05-181-2/+2
* [AArch64] Remove AArch64AddressTypePromotion passJun Bum Lim2017-05-051-9/+0
* [AArch64] Move GISel accessor initialization from TargetMachine to Subtarget.Quentin Colombet2017-05-011-55/+0
* [globalisel][tablegen] Compute available feature bits correctly.Daniel Sanders2017-04-291-2/+5
* [globalisel][tablegen] Move <Target>InstructionSelector declarations to anony...Daniel Sanders2017-04-061-2/+2
* [CodeGenPrep] move aarch64-type-promotion to CGPJun Bum Lim2017-04-031-1/+1
* [GlobalISel] Add a way for targets to enable GISel.Ahmed Bougacha2017-03-011-0/+11
* [AArch64] Add new target feature to fuse literal generationEvandro Menezes2017-02-011-0/+14
* [CodeGen] Move MacroFusion to the targetEvandro Menezes2017-02-011-1/+2
* Re-commit: [globalisel] Tablegen-erate current Register Bank InformationDaniel Sanders2017-01-191-0/+2
* [AArch64, Lanai] Fix some Clang-tidy modernize and Include What You Use warni...Eugene Zelenko2017-01-061-8/+30
* [GlobalISel] Drop workaround for Legalizer member/class sharing a name. NFC.Ahmed Bougacha2016-12-151-1/+1
* MachineScheduler: Export function to construct "default" scheduler.Matthias Braun2016-11-281-0/+10
* AArch64: Use DeadRegisterDefinitionsPass before regalloc.Matthias Braun2016-11-161-3/+4
* GlobalISel: Fix indentation. NFCDiana Picus2016-11-141-1/+1
* AArch64 ILP32 relocations for assembly and ELFJoel Jones2016-10-241-3/+9
* GlobalISel: rename legalizer components to match others.Tim Northover2016-10-141-6/+6
* GlobalISel: select G_GLOBAL_VALUE uses on AArch64.Tim Northover2016-10-101-1/+1
* Move the global variables representing each Target behind accessor functionMehdi Amini2016-10-091-3/+3
* [AArch64] Avoid generating indexed vector instructions for ExynosSebastian Pop2016-10-081-0/+2
* Move AArch64BranchRelaxation to generic codeMatt Arsenault2016-10-061-2/+2
* Revert "[AArch64] Use the reciprocal estimation machinery"Evandro Menezes2016-09-201-26/+2
* [AArch64] Register passes so they can be run by llcDiana Picus2016-08-011-48/+74
* [GlobalISel] Introduce an instruction selector.Ahmed Bougacha2016-07-271-2/+20
* Fix a GCC error due to this member name also being a type name. ThisChandler Carruth2016-07-231-3/+3
* GlobalISel: implement legalization pass, with just one transformation.Tim Northover2016-07-221-0/+12
* [AArch64] Register AArch64LoadStoreOptimizer so it can be run by llc -run-pas...Geoff Berry2016-07-201-0/+1
* [AArch64] Change the preferred alignment for char and short to word alignment.Chad Rosier2016-07-071-2/+2
* Revert "[AArch64] Change the preferred alignment for char and short to word a...Chad Rosier2016-07-071-2/+2
OpenPOWER on IntegriCloud