summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
Commit message (Expand)AuthorAgeFilesLines
* [AArch64] Map G_LOAD on FPR when the definition goes to a copy to FPRQuentin Colombet2017-11-181-2/+11
* [AArch64] Map G_STORE on FPR when the source comes from a FPR copyQuentin Colombet2017-11-181-1/+9
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-3/+3
* [AArch64][RegisterBankInfo] Add mapping for G_FPEXT.Quentin Colombet2017-11-021-0/+32
* [AArch64][RegisterBankInfo] Add FPR16 support in value mapping.Quentin Colombet2017-11-021-3/+5
* [aarch64][globalisel] Register banks and classes should have distinct names.Daniel Sanders2017-10-181-4/+3
* Re-apply [AArch64][RegisterBankInfo] Use the statically computed mappings for...Quentin Colombet2017-10-161-4/+35
* [AArch64][RegisterBankInfo] Add mapping support for G_BITCAST of s128Quentin Colombet2017-10-161-2/+2
* Revert "[AArch64][RegisterBankInfo] Use the statically computed mappings for ...Bruno Cardoso Lopes2017-10-141-32/+4
* [AArch64][RegisterBankInfo] Use the statically computed mappings for COPYQuentin Colombet2017-10-141-4/+32
* [GISEl]: Translate phi into G_PHIAditya Nandakumar2017-08-231-1/+2
* [GlobalISel] Make GlobalISel a non-optional library.Quentin Colombet2017-08-031-4/+0
* GlobalISel: map 128-bit values to an FPR by default.Tim Northover2017-07-281-1/+2
* GlobalISel: remove G_SEQUENCE instruction.Tim Northover2017-06-231-4/+0
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-2/+2
* [AArch64][RegisterBankInfo] Change the default mapping of fp stores.Quentin Colombet2017-05-101-0/+11
* [AArch64][RegisterBankInfo] Change the default mapping of fp loads.Quentin Colombet2017-05-081-0/+14
* [AArch64][RegisterBankInfo] Fix mapping cost for GPR.Quentin Colombet2017-05-081-1/+1
* [RegisterBankInfo] Uniquely allocate instruction mapping.Quentin Colombet2017-05-051-30/+30
* [GlobalISel] Support vector-of-pointers in LLTKristof Beyls2017-04-191-2/+2
* Revert "[GlobalISel] Support vector-of-pointers in LLT"Kristof Beyls2017-04-181-2/+2
* [GlobalISel] Support vector-of-pointers in LLTKristof Beyls2017-04-181-2/+2
* GlobalISel: fall back gracefully when we can't map an operand's size.Tim Northover2017-02-061-3/+9
* [AArch64] Fix some Clang-tidy modernize and Include What You Use warnings; ot...Eugene Zelenko2017-02-011-18/+21
* Re-commit: [globalisel] Tablegen-erate current Register Bank InformationDaniel Sanders2017-01-191-3/+3
* Re-revert: [globalisel] Tablegen-erate current Register Bank InformationDaniel Sanders2017-01-181-3/+3
* Re-commit: [globalisel] Tablegen-erate current Register Bank InformationDaniel Sanders2017-01-181-3/+3
* Revert r292132: [globalisel] Tablegen-erate current Register Bank Information...Daniel Sanders2017-01-161-3/+3
* [globalisel] Tablegen-erate current Register Bank InformationDaniel Sanders2017-01-161-3/+3
* [globalisel][aarch64] Make getCopyMapping() take register banks ID's rather t...Daniel Sanders2017-01-131-10/+10
* [aarch64][globalisel] Move getValueMapping/getCopyMapping to AArch64GenRegist...Daniel Sanders2017-01-131-17/+16
* [aarch64][globalisel] Refactor getRegBankBaseIdxOffset() to remove the power-...Daniel Sanders2017-01-131-5/+7
* [aarch64][globalisel] Move data into <Target>GenRegisterBankInfo. NFC.Daniel Sanders2017-01-131-82/+51
* [globalisel] Move as much RegisterBank initialization to the constructor as p...Daniel Sanders2017-01-121-15/+14
* [globalisel] Initialize RegisterBanks with static data.Daniel Sanders2017-01-121-8/+4
* GlobalISel: handle G_SEQUENCE fallbacks gracefully.Tim Northover2016-12-061-0/+4
* [globalisel][aarch64] Fix unintended assumptions about PartialMappingIdx. NFC.Daniel Sanders2016-12-061-12/+14
* [globalisel][aarch64] Correct argument names in comments.Daniel Sanders2016-12-061-3/+3
* [globalisel][aarch64] Prefix PartialMappingIdx enumerators with 'PMI_' to fit...Daniel Sanders2016-12-061-50/+54
* [AArch64][RegisterBankInfo] Fix typo in the logic used in assert.Quentin Colombet2016-12-051-1/+1
* [AArch64][RegisterBankInfo] Switch to fully static opds mapping for G_BITCAST.Quentin Colombet2016-10-131-4/+10
* [AArch64][RegisterBankInfo] Provide alternative mappings for 64-bit loadQuentin Colombet2016-10-131-1/+30
* [AArch64][RegisterBankInfo] Provide alternative mappings for G_BITCASTs.Quentin Colombet2016-10-131-8/+45
* [AArch64][RegisterBankInfo] Describe cross regbank copies statically.Quentin Colombet2016-10-131-0/+30
* [AArch64][RegisterBankInfo] Use static mapping for same bank G_BITCAST.Quentin Colombet2016-10-131-0/+8
* [AArch64][RegisterBankInfo] Bump the cost of vector loads.Quentin Colombet2016-10-131-0/+10
* [AArch64][RegisterBankInfo] Use a proper cost for cross regbank G_BITCASTs.Quentin Colombet2016-10-131-2/+11
* [AArch64][RegisterBankInfo] Provide more realistic copy costs.Quentin Colombet2016-10-131-1/+10
* [AArch64][RegisterBankInfo] Add getSameKindofOperandsMapping.Quentin Colombet2016-10-031-26/+44
* [AArch64][RegisterBankInfo] Use the helper functions for the checksQuentin Colombet2016-09-301-29/+26
OpenPOWER on IntegriCloud