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path: root/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
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* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-3/+3
* [AArch64] Add patterns to replace fsub fmul with fma fneg.Florian Hahn2017-12-061-3/+102
* [CodeGen] Print "%vreg0" as "%0" in both MIR and debug outputFrancis Visoiu Mistrih2017-11-301-11/+11
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-6/+6
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-2/+2
* AArch64: account for possible frame index operand in compares.Tim Northover2017-10-171-0/+6
* [MachineOutliner] Disable outlining from LinkOnceODRs by defaultJessica Paquette2017-10-071-7/+18
* [MachineOutliner] AArch64: Avoid saving + restoring LR if possibleJessica Paquette2017-09-271-35/+138
* [AArch64] Adjust the cost model for Exynos M1 and M2Evandro Menezes2017-09-181-5/+59
* [AArch64] Adjust the cost model for Exynos M1 and M2Evandro Menezes2017-09-181-1/+2
* Allow target to decide when to cluster loads/stores in mischedStanislav Mekhanoshin2017-09-131-0/+5
* [AArch64] Adjust the cost model for Exynos M1 and M2Evandro Menezes2017-08-281-31/+72
* [AArch64] Add FMOVH0: materialize 0 using zero register for f16 valuesSjoerd Meijer2017-08-241-0/+1
* [MachineOutliner] Add RegState::Define to LDRXpost in insertOutlinedCallJessica Paquette2017-08-101-1/+1
* [MachineOutliner] Ensure AArch64 outliner doesn't mess with W30 or LRJessica Paquette2017-08-081-6/+7
* [MachineOutliner] NFC: Change IsTailCall to a call class + frame classJessica Paquette2017-07-291-22/+27
* [MachineOutliner] NFC: Split up getOutliningBenefitJessica Paquette2017-07-281-225/+227
* Remove unused function from AArch64 backend (NFC)Adrian Prantl2017-07-271-12/+0
* [AArch64][Falkor] Avoid HW prefetcher tag collisions (step 1)Geoff Berry2017-07-141-4/+9
* [MIR] Add support for printing and parsing target MMO flagsGeoff Berry2017-07-131-0/+7
* Doxygen formatting. NFCIJoel Jones2017-07-101-0/+9
* [AArch64] Fix -Wimplicit-fallthrough warnings. NFCI.Simon Pilgrim2017-07-071-0/+2
* Doxygen formatting. NFCIJoel Jones2017-07-061-2/+12
* [AArch64] Prefer Bcc to CBZ/CBNZ/TBZ/TBNZ when NZCV flags can be set for "free".Chad Rosier2017-06-231-3/+3
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
* [AArch64][Falkor] Refine sched details for LSLfast/ASRfast.Geoff Berry2017-05-231-8/+119
* Fix an improperly placed curly bracket. NFC.Chad Rosier2017-05-161-1/+1
* [AArch64][MachineCombine] Fold FNMUL+FSUB -> FNMADD.Chad Rosier2017-05-111-0/+28
* Move size and alignment information of regclass to TargetRegisterInfoKrzysztof Parzyszek2017-04-241-4/+6
* Re-commit r301040 "X86: Don't emit zero-byte functions on Windows"Hans Wennborg2017-04-211-1/+1
* Revert r301040 "X86: Don't emit zero-byte functions on Windows"Hans Wennborg2017-04-211-1/+1
* X86: Don't emit zero-byte functions on WindowsHans Wennborg2017-04-211-1/+1
* [AArch64] Refine Falkor Machine Model - Part 3Balaram Makam2017-04-081-0/+11
* [Outliner] Revert r298734.Jessica Paquette2017-03-241-1/+1
* [Outliner] Remove no red zone requirment for AArch64Jessica Paquette2017-03-241-1/+1
* [Outliner] ACTUALLY remove the errs outputJessica Paquette2017-03-201-1/+1
* [Outliner] Remove output for offset range checkJessica Paquette2017-03-201-3/+1
* [Outliner] Add outliner for AArch64Jessica Paquette2017-03-171-11/+269
* TargetInstrInfo: Provide default implementation of isTailCall().Matthias Braun2017-03-161-11/+0
* Remove CRC32 instructions from AArch64InstrInfo::hasShiftedRegAzharuddin Mohammed2017-03-121-8/+0
* [CodeGen] Move MacroFusion to the targetEvandro Menezes2017-02-011-82/+0
* [XRay][AArch64] More staging for tail call support in XRay on AArch64 - in LLVMSerge Rogatch2017-01-251-0/+11
* [AArch64] Rename 'no-quad-ldst-pairs' to 'slow-paired-128'Evandro Menezes2017-01-241-1/+1
* [AArch64] Generate literals by the little endEvandro Menezes2017-01-181-4/+4
* [CodeGen] Rename MachineInstrBuilder::addOperand. NFCDiana Picus2017-01-131-2/+2
* [AArch64, Lanai] Fix some Clang-tidy modernize and Include What You Use warni...Eugene Zelenko2017-01-061-23/+48
* Code cleanup: Remove tab indents.Logan Chien2017-01-051-3/+3
* [AArch64] Fold some filled/spilled subreg COPYsGeoff Berry2017-01-051-10/+103
* [AArch64] Fold more spilled/refilled COPYs.Geoff Berry2016-12-011-10/+36
* [AArch64] Fold spills of COPY of WZR/XZRGeoff Berry2016-11-291-0/+25
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