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path: root/llvm/lib/Target/AArch64/AArch64ISelLowering.h
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* Add missing 'override' keyword.Craig Topper2014-11-281-1/+1
* AArch64: treat [N x Ty] as a block during procedure calls.Tim Northover2014-11-271-0/+4
* DAGCombiner: Allow the DAGCombiner to combine multiple FDIVs with the same di...Hao Liu2014-11-211-0/+1
* [AArch64] Generate vector signed/unsigned mul and mla/mls long.Chad Rosier2014-10-081-0/+3
* constify TargetMachine parameter.Eric Christopher2014-10-031-1/+1
* [X86] Use the generic AtomicExpandPass instead of X86AtomicExpandPassRobin Morisset2014-09-171-0/+1
* AArch64: fix big-endian immediate materialisationTim Northover2014-09-041-0/+7
* Refactor AtomicExpandPass and add a generic isAtomic() method to InstructionRobin Morisset2014-09-031-1/+3
* Add override to overriden virtual methods, remove virtual keywords.Benjamin Kramer2014-09-031-1/+1
* Fix typos in comments, NFCRobin Morisset2014-08-291-2/+1
* Canonicalize header guards into a common format.Benjamin Kramer2014-08-131-3/+3
* Add alignment value to allowsUnalignedMemoryAccessMatt Arsenault2014-07-271-3/+4
* [stack protector] Fix a potential security bug in stack protector where theAkira Hatanaka2014-07-251-0/+1
* [AArch64] Lower sdiv x, pow2 using add + select + shift.Chad Rosier2014-07-231-0/+3
* [codegen,aarch64] Add a target hook to the code generator to controlChandler Carruth2014-07-031-0/+3
* Move AArch64TargetLowering to AArch64Subtarget.Eric Christopher2014-06-101-1/+1
* AArch64/ARM64: move ARM64 into AArch64's placeTim Northover2014-05-241-0/+464
* AArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.Tim Northover2014-05-241-410/+0
* Revert "Implement global merge optimization for global variables."Rafael Espindola2014-05-161-4/+0
* Implement global merge optimization for global variables.Jiangning Liu2014-05-151-0/+4
* Pass the value type to TLI::getRegisterByNameHal Finkel2014-05-111-1/+1
* Add 'override' to getRegisterByName in *ISelLowering.hHal Finkel2014-05-111-1/+1
* Implememting named register intrinsicsRenato Golin2014-05-061-0/+2
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final...Craig Topper2014-04-291-22/+26
* [AArch64] Enable global merge pass.Jiangning Liu2014-04-221-0/+4
* This commit enables unaligned memory accesses of vector types on AArch64 back...Jiangning Liu2014-04-181-0/+6
* [AArch64] Implement the isLegalAddressingMode and getScalingFactorCost APIs.Chad Rosier2014-04-121-0/+11
* [AArch64] Implement the isZExtFree APIs.Chad Rosier2014-04-091-0/+4
* [AArch64] Implement the isTruncateFree API.Chad Rosier2014-04-091-0/+4
* [AArch64] Lower SHL_PARTS, SRA_PARTS and SRL_PARTSLogan Chien2014-03-271-0/+3
* Switch all uses of LLVM_OVERRIDE to just use 'override' directly.Craig Topper2014-03-021-2/+2
* [AArch64 NEON] Try to generate CONCAT_VECTOR when lowering BUILD_VECTOR or SH...Kevin Qin2014-01-271-1/+5
* Revert r199791.Kevin Qin2014-01-271-5/+1
* fix some spell mistakes around 'ConcatVector' and 'ShuffleVector' in AArch64 ...Kevin Qin2014-01-231-1/+1
* [AArch64 NEON] Try to generate CONCAT_VECTOR when lowering BUILD_VECTOR or SH...Kevin Qin2014-01-221-1/+5
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-071-1/+1
* Remove the 's' DataLayout specificationRafael Espindola2014-01-011-0/+2
* [AArch64 NEON]Implment loading vector constant form constant pool.Kevin Qin2013-12-181-0/+2
* [AArch64 NEON] Get instruction BSL matched to VSELECT.Kevin Qin2013-12-111-3/+0
* For AArch64, add missing register cost calculation for big value types like v...Jiangning Liu2013-12-051-0/+4
* Refactored the implementation of AArch64 NEON instruction ZIP, UZPKevin Qin2013-11-261-0/+10
* Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.Hao Liu2013-11-191-2/+22
* Implement the newly added ACLE functions for ld1/st1 with 2/3/4 vectors.Hao Liu2013-11-181-1/+7
* Implement aarch64 neon instruction class SIMD misc.Kevin Qin2013-11-141-0/+5
* Implement AArch64 Neon instruction set Bitwise Extract.Jiangning Liu2013-11-061-0/+3
* Implement AArch64 post-index vector load/store multiple N-element structure c...Hao Liu2013-11-051-1/+13
* [AArch64] Implement FrameAddr and ReturnAddrWeiming Zhao2013-10-291-0/+2
* Implement aarch64 neon instruction set AdvSIMD (copy).Kevin Qin2013-10-111-3/+7
* Implement AArch64 vector load/store multiple N-element structure class SIMD(l...Hao Liu2013-10-101-0/+4
* Revert "Implement AArch64 vector load/store multiple N-element structure clas...Rafael Espindola2013-10-101-4/+0
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