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Project Ortega BCM5719 LLVM
Raptor Computing Systems
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path:
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llvm
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lib
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Target
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AArch64
/
AArch64AdvSIMDScalarPass.cpp
Commit message (
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)
Author
Age
Files
Lines
*
Use StringRef in Pass/PassManager APIs (NFC)
Mehdi Amini
2016-10-01
1
-3
/
+1
*
[AArch64] Register passes so they can be run by llc
Diana Picus
2016-08-01
1
-4
/
+0
*
AArch64: Avoid implicit iterator conversions, NFC
Duncan P. N. Exon Smith
2016-07-08
1
-26
/
+24
*
Add optimization bisect opt-in calls for AArch64 passes
Andrew Kaylor
2016-04-25
1
-0
/
+3
*
[AArch64][AdvSIMDScalar] Update the kill flags correctly.
Quentin Colombet
2016-04-22
1
-30
/
+45
*
AArch64: Remove implicit ilist iterator conversions, NFC
Duncan P. N. Exon Smith
2015-10-13
1
-1
/
+1
*
[AArch64] Register (existing) AArch64AdvSIMDScalar pass with LLVM pass manager.
Chad Rosier
2015-08-05
1
-2
/
+13
*
MachineInstr: Change return value of getOpcode() to unsigned.
Matthias Braun
2015-05-18
1
-4
/
+4
*
This only needs TargetInstrInfo, not the specialized one.
Eric Christopher
2015-01-30
1
-3
/
+3
*
Migrate AArch64 except for TTI and AsmPrinter away from getSubtargetImpl.
Eric Christopher
2015-01-28
1
-3
/
+1
*
Remove the TargetMachine forwards for TargetSubtargetInfo based
Eric Christopher
2014-08-04
1
-1
/
+3
*
[AArch64] Extend the number of scalar instructions supported in the AdvSIMD
Chad Rosier
2014-08-04
1
-0
/
+6
*
Run sort_includes.py on the AArch64 backend.
Benjamin Kramer
2014-07-25
1
-1
/
+1
*
AArch64/ARM64: move ARM64 into AArch64's place
Tim Northover
2014-05-24
1
-0
/
+387