| Commit message (Collapse) | Author | Age | Files | Lines |
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target-independent way of determining overflow on multiplication. It's very
tricky. Patch by Zoltan Varga!
llvm-svn: 60800
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essential problem was that the DAG can contain
random unused nodes which were never analyzed.
When remapping a value of a node being processed,
such a node may become used and need to be analyzed;
however due to operands being transformed during
analysis the node may morph into a different one.
Users of the morphing node need to be updated, and
this wasn't happening. While there I added a bunch
of documentation and sanity checks, so I (or some
other poor soul) won't have to scratch their head
over this stuff so long trying to remember how it
was all supposed to work next time some obscure
problem pops up! The extra sanity checking exposed
a few places where invariants weren't being preserved,
so those are fixed too. Since some of the sanity
checking is expensive, I added a flag to turn it
on. It is also turned on when building with
ENABLE_EXPENSIVE_CHECKS=1.
llvm-svn: 60797
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llvm-svn: 60771
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llvm-svn: 60769
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one of its operand.
llvm-svn: 60749
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Fix the shift amount when unrolling a vector shift into scalar shifts.
Fix problem in getShuffleScalarElt where it assumes that the input of
a bit convert must be a vector.
llvm-svn: 60740
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pipeline model.
llvm-svn: 60733
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llvm-svn: 60707
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and use it in x86 address mode folding. Also, make
getRegForValue return 0 for illegal types even if it has a
ValueMap for them, because Argument values are put in the
ValueMap. This fixes PR3181.
llvm-svn: 60696
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llvm-svn: 60684
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llvm-svn: 60683
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live interval updating.
llvm-svn: 60652
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constpool into a use, the rewrite happens at time of spill (not in VirtRegMap). Later on, if the GlobalBaseReg is spilled, the spiller can see the use uses GlobalBaseReg and do the right thing.
llvm-svn: 60596
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llvm-svn: 60592
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llvm-svn: 60586
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changing the stack slots on an instruction, to keep them
consistent with the actual memory addresses.
llvm-svn: 60584
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While they appear to provide a normal clobbering def, they don't
in the case of the awkward IMPLICIT_DEF+INSERT_SUBREG idiom. It
would be good to change INSERT_SUBREG; until then, this change
allows post-regalloc scheduling to cope in a mildly conservative
way.
llvm-svn: 60583
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llvm-svn: 60553
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number of bytes for types such as i1 which are not
a multiple of 8 bits in length.
llvm-svn: 60543
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llvm-svn: 60525
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llvm-svn: 60524
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the main thing this covers is spills to distinct spill slots.
llvm-svn: 60517
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issues with subreg operands and tied operands.
llvm-svn: 60510
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on PseudoSourceValue values. This also fixes a FIXME in
lib/VMCode/AsmWriter.cpp.
llvm-svn: 60507
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llvm-svn: 60500
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an area where eventually it would be good to use target-dependent
information.
llvm-svn: 60498
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examining non-anti-dependence edges.
llvm-svn: 60496
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llvm-svn: 60495
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parts, and add target-independent code to add/preserve
MachineMemOperands.
llvm-svn: 60488
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llvm-svn: 60487
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a new node if the node was actually remapped.
llvm-svn: 60482
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Print a single parameter .file directive if we have an ELF target.
llvm-svn: 60480
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is set but mayLoad is not set. Fix all the problems this turned up.
Change code to not use isSimpleLoad instead of mayLoad unless it
really wants isSimpleLoad.
llvm-svn: 60459
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1. ppcf128 select is expanded to f64 select's.
2. f64 select operand 0 is an i1 truncate, it's promoted to i32 zero_extend.
3. f64 select is updated. It's changed back to a "NewNode" and being re-analyzed.
4. f64 select operands are being processed. Operand 0 is a "NewNode". It's being expunged out of ReplacedValues map.
5. ExpungeNode tries to remap f64 select and notice it's a "NewNode" and assert.
Duncan, please take a look. Thanks.
llvm-svn: 60443
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consistent with the way it's generally done in other places.
llvm-svn: 60439
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llvm-svn: 60434
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splitting.
llvm-svn: 60433
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llvm-svn: 60432
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llvm-svn: 60409
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llvm-svn: 60406
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llvm-svn: 60392
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llvm-svn: 60391
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types.
llvm-svn: 60381
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MERGE_VALUES node with only one operand, so get
rid of special code that only existed to handle
that possibility.
llvm-svn: 60349
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ReplaceNodeResults: rather than returning a node which
must have the same number of results as the original
node (which means mucking around with MERGE_VALUES,
and which is also easy to get wrong since SelectionDAG
folding may mean you don't get the node you expect),
return the results in a vector.
llvm-svn: 60348
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as unsigned divisions. Same caveats as before.
llvm-svn: 60284
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multiplies.
Some more cleverness would be nice, though. It would be nice if we
could do this transformation on illegal types. Also, we would
prefer a narrower constant when possible so that we can use a narrower
multiply, which can be cheaper.
llvm-svn: 60283
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nearby FIXME.
I'm not sure what the right way to fix the Cell test was; if the
approach I used isn't okay, please let me know.
llvm-svn: 60277
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Despite changing the order of evaluation, this doesn't actually change the
meaning of the statement.
llvm-svn: 60177
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llvm-svn: 60149
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