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authorNick Lewycky <nicholas@mxc.ca>2008-11-27 17:29:52 +0000
committerNick Lewycky <nicholas@mxc.ca>2008-11-27 17:29:52 +0000
commit2c96bdd8d62c4e3daa0f7558c7276a40fd32599b (patch)
treeb9636f910d1c5b373e768601dcbcc475c593b761 /llvm/lib/CodeGen
parent50343cd2fe29b6d202f5afc6922dd5393ead12c6 (diff)
downloadbcm5719-llvm-2c96bdd8d62c4e3daa0f7558c7276a40fd32599b.tar.gz
bcm5719-llvm-2c96bdd8d62c4e3daa0f7558c7276a40fd32599b.zip
Silence a warning.
Despite changing the order of evaluation, this doesn't actually change the meaning of the statement. llvm-svn: 60177
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/PostRASchedulerList.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/PostRASchedulerList.cpp b/llvm/lib/CodeGen/PostRASchedulerList.cpp
index c30cd61f346..09125d04887 100644
--- a/llvm/lib/CodeGen/PostRASchedulerList.cpp
+++ b/llvm/lib/CodeGen/PostRASchedulerList.cpp
@@ -397,7 +397,7 @@ bool SchedulePostRATDList::BreakAntiDependencies() {
// Determine AntiDepReg's register class, if it is live and is
// consistently used within a single class.
const TargetRegisterClass *RC = AntiDepReg != 0 ? Classes[AntiDepReg] : 0;
- assert(AntiDepReg == 0 || RC != NULL &&
+ assert((AntiDepReg == 0 || RC != NULL) &&
"Register should be live if it's causing an anti-dependence!");
if (RC == reinterpret_cast<TargetRegisterClass *>(-1))
AntiDepReg = 0;
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