summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
Commit message (Collapse)AuthorAgeFilesLines
...
* - Doh. Pass vector by value is bad.Evan Cheng2008-09-071-1/+11
| | | | | | - Add a AnalyzeCallResult specialized for calls which produce a single value. This is used by fastisel. llvm-svn: 55879
* Next limited float precision expansion (log2 12 bits)Dale Johannesen2008-09-051-3/+43
| | | | llvm-svn: 55866
* Revert r55859. This is breaking the build in the abscence of its companion ↵Owen Anderson2008-09-051-4/+12
| | | | | | commit. llvm-svn: 55865
* Move the code that inserts copies for function livein registersDan Gohman2008-09-052-109/+113
| | | | | | | | | out of ScheduleDAGEmit.cpp and into SelectionDAGISel.cpp. This allows it to be run exactly once per function, even if multiple SelectionDAG iterations happen in the entry block, as may happen with FastISel. llvm-svn: 55863
* Add the next limited-precision expansion.Dale Johannesen2008-09-051-3/+42
| | | | llvm-svn: 55856
* FastISel support for AND and OR with type i1.Dan Gohman2008-09-051-2/+10
| | | | llvm-svn: 55846
* Add hooks for other intrinsics to get low-precision expansions.Dale Johannesen2008-09-052-12/+60
| | | | llvm-svn: 55845
* FastISel support for ConstantExprs.Dan Gohman2008-09-051-5/+17
| | | | llvm-svn: 55843
* Revert r55817. It broke PIC. FastISel will need to find a differentDan Gohman2008-09-051-3/+1
| | | | | | approach here. llvm-svn: 55842
* Add a variant of AnalyzeCallOperands that can be used by fast isel.Evan Cheng2008-09-051-0/+17
| | | | llvm-svn: 55838
* "Fix" PR2762. The testcase now crashes codegenDuncan Sands2008-09-051-1/+19
| | | | | | | elsewhere due to a missing pattern for v2f64 = sint_to_fp v2i32. That is PR2687. llvm-svn: 55828
* Fix a search+replace-o.Dan Gohman2008-09-051-1/+1
| | | | llvm-svn: 55824
* Add -flimit-float-precision to enable some faster,Dale Johannesen2008-09-052-3/+57
| | | | | | | | | but less accurate (non-IEEE) code sequences for certain math library functions. Add the first of several such expansions. Don't worry, if you don't turn it on it won't affect you. llvm-svn: 55823
* FastISel support for unreachable.Dan Gohman2008-09-051-0/+4
| | | | llvm-svn: 55818
* In FastISel mode, the scheduler may be invoked multiple timesDan Gohman2008-09-051-1/+3
| | | | | | | in the same block. Fix the entry-block handling to only run at at the beginning of the entry block, and not any other times. llvm-svn: 55817
* Add initial support for selecting constant materializations that require ↵Owen Anderson2008-09-051-1/+1
| | | | | | | | constant pool loads on X86 in fast isel. This isn't actually used yet. llvm-svn: 55814
* Add an include of SmallSet.h.Dan Gohman2008-09-041-0/+1
| | | | llvm-svn: 55793
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-0426-30/+29
| | | | llvm-svn: 55779
* Clean up uses of TargetLowering::getTargetMachine.Dan Gohman2008-09-043-6/+6
| | | | llvm-svn: 55769
* Fix an overly strict assertion. Source register of a copy may not be killed, ↵Evan Cheng2008-09-041-1/+2
| | | | | | it may be killed by an implicit super-register use. llvm-svn: 55762
* Add intrinsics for log, log2, log10, exp, exp2.Dale Johannesen2008-09-044-0/+328
| | | | | | No functional change (and no FE change to generate them). llvm-svn: 55753
* Do trivial local CSE for constants and other non-Instruction valuesDan Gohman2008-09-031-12/+15
| | | | | | in FastISel. llvm-svn: 55748
* Put RegsForValue in the llvm namespace to avoid warnings aboutDan Gohman2008-09-031-1/+1
| | | | | | | classes in the llvm namespace having members with types from anonymous namespaces. llvm-svn: 55747
* Create HandlePHINodesInSuccessorBlocksFast, a version ofDan Gohman2008-09-033-187/+226
| | | | | | | | | | | | | HandlePHINodesInSuccessorBlocks that works FastISel-style. This allows PHI nodes to be updated correctly while using FastISel. This also involves some code reorganization; ValueMap and MBBMap are now members of the FastISel class, so they needn't be passed around explicitly anymore. Also, SelectInstructions is changed to SelectInstruction, and only does one instruction at a time. llvm-svn: 55746
* Do not emit a UsedDirective for things in the llvm.usedDale Johannesen2008-09-031-3/+32
| | | | | | | | | list that have internal linkage; the linker doesn't need or want this. (These objects must still be preserved at compile time, so just removing them from the llvm.used list doesn't work.) Should affect only Darwin. llvm-svn: 55722
* Oops, I accidentally broke the fallback case with my last commit.Owen Anderson2008-09-031-0/+2
| | | | llvm-svn: 55704
* Fix an issue where we were reusing materializations of constants in blocks ↵Owen Anderson2008-09-031-9/+15
| | | | | | | | | not dominated by the materialization. This is the simple fix, materializing the constant before every use. It might be better to either track domination of uses or to materialize all constants and the beginning of the function and let remat sort when to do materialization at uses. llvm-svn: 55703
* Split the SelectionDAG-building code, including the FunctionLoweringInfoDan Gohman2008-09-033-5134/+5303
| | | | | | | and SelectionDAGLowering classes, out of SelectionDAGISel.cpp and put it in a separate file, SelectionDAGBuild.cpp. llvm-svn: 55701
* Separate MachineInstr-emitting routines from actual schedulingDan Gohman2008-09-032-751/+772
| | | | | | routines and move them into a separate file, ScheduleDAGEmit.cpp. llvm-svn: 55699
* Fix addRegisterDead and addRegisterKilled to be more thoroughDan Gohman2008-09-031-19/+34
| | | | | | | | | | | | | | | | when searching for redundant subregister dead/kill bits. Previously it was common to see instructions marked like this: "RET %EAX<imp-use,kill>, %AX<imp-use,kill>" With this change, addRegisterKilled continues scanning after finding the %EAX operand, so it proceeds to discover the redundant %AX kill and eliminates it, producing this: "RET %EAX<imp-use,kill>" This currently has no effect on the generated code. llvm-svn: 55698
* If TargetSelectInstruction returns true, move to next instruction.Evan Cheng2008-09-031-1/+3
| | | | llvm-svn: 55692
* 80 col violations.Evan Cheng2008-09-021-2/+4
| | | | llvm-svn: 55668
* Ensure that HandlePHINodesInSuccessorBlocks is run for all blocks,Dan Gohman2008-09-021-3/+9
| | | | | | | even in FastISel mode in the case where FastISel successfully selects all the instructions. llvm-svn: 55641
* Provide two overloads of AnalyzeNewNode.Gabor Greif2008-09-012-17/+24
| | | | | | | | | | | The first can update the SDNode in an SDValue while the second is called with SDNode* and returns a possibly updated SDNode*. This patch has no intended functional impact, but helps eliminating ugly temporary SDValues. llvm-svn: 55608
* Even though no caller actually uses the new valueDuncan Sands2008-09-011-1/+2
| | | | | | | (what matters is that it is added to the worklist), it seems more logical to return it. llvm-svn: 55606
* Cosmetic changes to Machine LICM. No functionality change.Bill Wendling2008-08-311-31/+36
| | | | llvm-svn: 55578
* Another situation where ROTR is cheaper than ROTL.Bill Wendling2008-08-311-3/+3
| | | | llvm-svn: 55577
* For this pattern, ROTR is the cheaper option.Bill Wendling2008-08-311-4/+4
| | | | llvm-svn: 55576
* - Fix comment so that it describes how the code really works:Bill Wendling2008-08-311-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | // fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) -> // (rotl x, y) // fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) -> // (rotr x, (sub 32, y)) Example: (x == 0xDEADBEEF and y == 4) (x << 4) | (x >> 28) => 0xEADBEEF0 | 0x0000000D => 0xEADBEEFD (rotl x, 4) => 0xEADBEEFD (rotr x, 28) => 0xEADBEEFD - Fix comment and code for second version. It wasn't using the rot* propertly. // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) -> // (rotr x, y) // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) -> // (rotl x, (sub 32, y)) (x << 28) | (x >> 4) => 0xD0000000 | 0x0DEADBEE => 0xDDEADBEE (rotl x, 4) => 0xEADBEEFD (rotr x, 28) => (0xEADBEEFD) llvm-svn: 55575
* typoGabor Greif2008-08-301-1/+1
| | | | llvm-svn: 55574
* fix some 80-col violationsGabor Greif2008-08-301-19/+23
| | | | llvm-svn: 55571
* Re-apply 55467 with fix. If copy is being replaced by remat'ed def, transfer ↵Evan Cheng2008-08-302-4/+83
| | | | | | the implicit defs onto the remat'ed instruction. llvm-svn: 55564
* Fold isRematerializable checks into isSafeToReMat.Evan Cheng2008-08-301-1/+3
| | | | llvm-svn: 55563
* Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 ↵Evan Cheng2008-08-301-0/+60
| | | | | | shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case). llvm-svn: 55558
* Fix an issue where a use might be selected before a def, and then we didn't ↵Owen Anderson2008-08-301-8/+23
| | | | | | | | | | | respect the pre-chosen vreg assignment when selecting the def. This is the naive solution to the problem: insert a copy to the pre-chosen vreg. Other solutions might be preferable, such as: 1) Passing the dest reg into FastEmit_. However, this would require the higher level code to know about reg classes, which they don't currently. 2) Selecting blocks in reverse postorder. This has some compile time cost for computing the order, and we'd need to measure its impact. llvm-svn: 55555
* Fix 80 col. violations.Evan Cheng2008-08-291-2/+4
| | | | llvm-svn: 55551
* Back out 55498. It broken Apple style bootstrapping.Evan Cheng2008-08-291-106/+81
| | | | llvm-svn: 55549
* Add a target callback for FastISel.Dan Gohman2008-08-281-2/+7
| | | | llvm-svn: 55512
* erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif2008-08-2814-696/+704
| | | | | | Node to reflect semantics llvm-svn: 55504
* Implement null and undef values for FastISel.Dan Gohman2008-08-281-0/+5
| | | | llvm-svn: 55500
OpenPOWER on IntegriCloud