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authorDan Gohman <gohman@apple.com>2008-09-05 01:07:48 +0000
committerDan Gohman <gohman@apple.com>2008-09-05 01:07:48 +0000
commit5b4a9f4a695ce82869f60dad527c77eb1d1d6501 (patch)
treefbec18c72e80862a7589badee27d7e5b224a2f6c /llvm/lib/CodeGen
parenta5753b31be5a5312ace8be56072ffc19a53b4c4f (diff)
downloadbcm5719-llvm-5b4a9f4a695ce82869f60dad527c77eb1d1d6501.tar.gz
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In FastISel mode, the scheduler may be invoked multiple times
in the same block. Fix the entry-block handling to only run at at the beginning of the entry block, and not any other times. llvm-svn: 55817
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp4
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp
index 21c12d3993f..fff444087a8 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp
@@ -731,7 +731,9 @@ void ScheduleDAG::EmitLiveInCopies(MachineBasicBlock *MBB) {
/// EmitSchedule - Emit the machine code in scheduled order.
MachineBasicBlock *ScheduleDAG::EmitSchedule() {
- bool isEntryBB = &MF->front() == BB;
+ // If we're emitting the first code into the entry block, we
+ // have additional work to do.
+ bool isEntryBB = &MF->front() == BB && BB->empty();
if (isEntryBB && !SchedLiveInCopies) {
// If this is the first basic block in the function, and if it has live ins
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